Technical Product Specification for Canoe Pass - Preminary - Intel
Technical Product Specification for Canoe Pass - Preminary - Intel
Technical Product Specification for Canoe Pass - Preminary - Intel
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<strong>Intel</strong> ® Server Board S2600CP and Server System P4000CP TPS <strong>Intel</strong>® Server Board S2600CP Functional Architecture<br />
4.2.2.4 RAS Features<br />
The server board supports the following memory RAS modes:<br />
Independent Channel Mode<br />
Rank Sparing Mode<br />
Mirrored Channel Mode<br />
Lockstep Channel Mode<br />
Regardless of RAS mode, the requirements <strong>for</strong> populating within a channel given in the section<br />
4.2.2.2 must be met at all times. Note that support of RAS modes that require matching DIMM<br />
population between channels (Mirrored and Lockstep) require that ECC DIMMs be populated.<br />
Independent Channel Mode is the only mode that supports non-ECC DIMMs in addition to ECC<br />
DIMMs.<br />
For RAS modes that require matching populations, the same slot positions across channels<br />
must hold the same DIMM type with regards to size and organization. DIMM timings do not<br />
have to match but timings will be set to support all DIMMs populated (i.e, DIMMs with slower<br />
timings will <strong>for</strong>ce faster DIMMs to the slower common timing modes).<br />
4.2.2.4.1 Independent Channel Mode<br />
Channels can be populated in any order in Independent Channel Mode. All four channels may<br />
be populated in any order and have no matching requirements. All channels must run at the<br />
same interface frequency but individual channels may run at different DIMM timings (RAS<br />
latency, CAS Latency, and so <strong>for</strong>th).<br />
4.2.2.4.2 Rank Sparing Mode<br />
In Rank Sparing Mode, one rank is a spare of the other ranks on the same channel. The spare<br />
rank is held in reserve and is not available as system memory. The spare rank must have<br />
identical or larger memory capacity than all the other ranks (sparing source ranks) on the same<br />
channel. After sparing, the sparing source rank will be lost.<br />
4.2.2.4.3 Mirrored Channel Mode<br />
In Mirrored Channel Mode, the memory contents are mirrored between Channel 0 and Channel 2<br />
and also between Channel 1 and Channel 3. As a result of the mirroring, the total physical<br />
memory available to the system is half of what is populated. Mirrored Channel Mode requires<br />
that Channel 0 and Channel 2, and Channel 1 and Channel 3 must be populated identically with<br />
regards to size and organization. DIMM slot populations within a channel do not have to be<br />
identical but the same DIMM slot location across Channel 0 and Channel 2 and across Channel<br />
1 and Channel 3 must be populated the same.<br />
4.2.2.4.4 Lockstep Channel Mode<br />
In Lockstep Channel Mode, each memory access is a 128-bit data access that spans Channel 0<br />
and Channel 1, and Channel 2 and Channel 3. Lockstep Channel mode is the only RAS mode<br />
that allows SDDC <strong>for</strong> x8 devices. Lockstep Channel Mode requires that Channel 0 and Channel<br />
1, and Channel 2 and Channel 3 must be populated identically with regards to size and<br />
organization. DIMM slot populations within a channel do not have to be identical but the same<br />
DIMM slot location across Channel 0 and Channel 1 and across Channel 2 and Channel 3 must<br />
be populated the same.<br />
Revision 0.8 <strong>Intel</strong> Confidential<br />
<strong>Intel</strong> order number G26942-003<br />
37