Technical Product Specification for Canoe Pass - Preminary - Intel
Technical Product Specification for Canoe Pass - Preminary - Intel
Technical Product Specification for Canoe Pass - Preminary - Intel
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<strong>Intel</strong> ® Server System P4000CP Power System Options <strong>Intel</strong> ® Server Board S2600CP and Server System P4000CP TPS<br />
specification. The step load may occur anywhere within the MIN load to the MAX load shown<br />
in Tables 143 and 144.<br />
148<br />
Table 142. Transient Load Requirements<br />
Output Max Step Load Size Max Load Slew Rate Test capacitive Load<br />
+ 3.3VDC 5A 0.25 A/s 250 F<br />
+ 5VDC 5A 0.25 A/s 400 F<br />
+5Vsb 0.5A 0.25A/s 20 F<br />
13.5.2.11 DC/DC Converter Capacitive Loading<br />
The DC/DC converters is stable and meet all requirements with the following capacitive loading<br />
ranges. Minimum capacitive loading applies to static load only.<br />
Table 143. Capacitive Loading Conditions<br />
Converter output Min Max Units<br />
+3.3VDC 250 6800 F<br />
+5VDC 400 4700 F<br />
5Vstby 20 350 F<br />
13.5.2.12 DC/DC Converters Closed Loop stability<br />
Each DC/DC converter is unconditionally stable under all line/load/transient load conditions<br />
including capacitive load ranges specified in Section 13.5.2.11. A minimum of: 45 degrees<br />
phase margin and -10dB-gain margin is required. The PDB provides proof of the unit’s<br />
closed-loop stability with local sensing through the submission of Bode plots. Closed-loop<br />
stability must be ensured at the maximum and minimum loads as applicable.<br />
13.5.2.13 Common Mode Noise<br />
The Common Mode noise on any output does not exceed 350mV pk-pk over the frequency<br />
band of 10Hz to 20MHz.<br />
The measurement shall be made across a 100Ω resistor between each of DC outputs,<br />
including ground, at the DC power connector and chassis ground (power subsystem<br />
enclosure).<br />
The test set-up shall use a FET probe such as Tektronix model P6046 or equivalent.<br />
13.5.2.14 Ripple/Noise<br />
The maximum allowed ripple/noise output of each DC/DC Converter is defined in below Table<br />
95. This is measured over a bandwidth of 0Hz to 20MHz at the PDB output connectors. A 10F<br />
tantalum capacitor in parallel with a 0.1F ceramic capacitor are placed at the point of<br />
measurement.<br />
Table 144. Ripple and Noise<br />
+3.3V +5V -12V +5VSB<br />
<strong>Intel</strong> Confidential Revision 0.8<br />
<strong>Intel</strong> order number G26942-003
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