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Technical Product Specification for Canoe Pass - Preminary - Intel

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<strong>Intel</strong> ® Server System P4000CP Power System Options <strong>Intel</strong> ® Server Board S2600CP and Server System P4000CP TPS<br />

136<br />

Converter output Tolerance Min Nom Max Units<br />

+ 3.3VDC -5%/+5% +3.14 +3.30 +3.46 VDC<br />

+ 5VDC -5%/+5% +4.75 +5.00 +5.25 VDC<br />

- 12VDC - 5%/+9% -13.08 -12.00 -11.40 VDC<br />

5Vstby -5%/+5% +4.75 +5.00 +5.25 VDC<br />

13.4.2.10 DC/DC Converters Dynamic Loading<br />

The output voltages remains within limits specified in table above <strong>for</strong> the step loading and<br />

capacitive loading specified in the table below. The load transient repetition rate is only a test<br />

specification. The step load may occur anywhere within the MIN load to the MAX load shown<br />

in Tables 116 and 117.<br />

Table 115. Transient Load Requirements<br />

Output Max Step Load Size Max Load Slew Rate Test capacitive Load<br />

+ 3.3VDC 5A 0.25 A/s 250 F<br />

+ 5VDC 5A 0.25 A/s 400 F<br />

+5Vsb 0.5A 0.25A/s 20 F<br />

13.4.2.11 DC/DC Converter Capacitive Loading<br />

The DC/DC converters are stable and meet all requirements with the following capacitive<br />

loading ranges. Minimum capacitive loading applies to static load only.<br />

Table 116. Capacitive Loading Conditions<br />

Converter output Min Max Units<br />

+3.3VDC 250 6800 F<br />

+5VDC 400 4700 F<br />

-12VDC 1 350 F<br />

5Vstby 20 350 F<br />

13.4.2.12 DC/DC Converters Closed Loop stability<br />

Each DC/DC converter is unconditionally stable under all line/load/transient load conditions<br />

including capacitive load ranges specified in Section 13.4.2.11. A minimum of: 45 degrees<br />

phase margin and -10dB-gain margin is required. The PDB provides proof of the unit’s<br />

closed-loop stability with local sensing through the submission of Bode plots. Closed-loop<br />

stability must be ensured at the maximum and minimum loads as applicable.<br />

13.4.2.13 Common Mode Noise<br />

The Common Mode noise on any output does not exceed 350mV pk-pk over the frequency<br />

band of 10Hz to 20MHz.<br />

The measurement shall be made across a 100Ω resistor between each of DC outputs,<br />

including ground, at the DC power connector and chassis ground (power subsystem<br />

enclosure).<br />

The test set-up shall use a FET probe such as Tektronix model P6046 or equivalent.<br />

<strong>Intel</strong> Confidential Revision 0.8<br />

<strong>Intel</strong> order number G26942-003

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