Technical Product Specification for Canoe Pass - Preminary - Intel

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Intel ® Server System P4000CP Power System Options Intel ® Server Board S2600CP and Server System P4000CP TPS 124 V OUT AC HOT POWER SUPPLY V AC NEUTRAL RETURN AC GROUND GENERAL NOTES: 1. LOAD THE OUTPUT WITH ITS MINIMUM LOAD CURRENT. 2. CONNECT THE PROBES AS SHOWN. 3. REPEAT THE MEASUREMENTS WITH THE MAXIMUM LOAD ON THE OUTPUT. 10uF .1uF LOAD LOAD MUST BE ISOLATED FROM THE GROUND OF THE POWER SUPPLY SCOPE SCOPE NOTE: USE A TEKTRONIX 7834 OSCILLOSCOPE WITH 7A13 AND DIFFERENTIAL PROBE P6055 OR EQUIVALENT. Figure 47. Differential Noise test setup Note: When performing this test, the probe clips and capacitors should be located close to the load. 13.3.4.12 Timing Requirements These are the timing requirements for the power supply operation. The output voltages must rise from 10% to within regulation limits (Tvout_rise) within 5 to 70ms. For 12VSB, it is allowed to rise from 1.0 to 25ms. All outputs must rise monotonically. Table below shows the timing requirements for the power supply being turned on and off via the AC input, with PSON held low and the PSON signal, with the AC input applied. Table 91. Timing Requirements Item Description Min Max Units T vout_rise Output voltage rise time 5.0 * 70 * ms Tsb_on_delay Delay from AC being applied to 12VSBbeing within regulation. 1500 ms Tac_on_delay Tvout_holdup Delay from AC being applied to all output voltages being within regulation. Time 12Vl output voltage stay within regulation after loss of AC. 3000 ms 13 ms Tpwok_holdup Delay from loss of AC to de-assertion of PWOK 12 ms Tpson_on_delay Tpson_pwok Tpwok_on T pwok_off Tpwok_low Tsb_vout T12VSB_holdup Delay from PSON# active to output voltages within regulation limits. Delay from PSON# deactivate to PWOK being deasserted. Delay from output voltages within regulation limits to PWOK asserted at turn on. Delay from PWOK de-asserted to output voltages dropping out of regulation limits. Duration of PWOK being in the de-asserted state during an off/on cycle using AC or the PSON signal. Delay from 12VSBbeing in regulation to O/Ps being in regulation at AC turn on. Time the 12VSBoutput voltage stays within regulation after loss of AC. * The 12VSBoutput voltage rise time shall be from 1.0ms to 25ms. 5 400 ms 5 ms 100 500 ms 1 ms 100 ms 50 1000 ms 70 ms Intel Confidential Revision 0.8 Intel order number G26942-003
Intel ® Server Board S2600CP and Server System P4000CP TPS Intel ® Server System P4000CP Power System Options AC Input Vout PWOK 12Vsb PSON T sb_on_delay T AC_on_delay T sb_vout 13.3.5 Protection Circuits T pwok_on AC turn on/off cycle T pwok_holdup T 5Vsb_holdup Tvout_holdup Figure 48. Turn On/Off Timing (Power Supply Signals) Protection circuits inside the power supply causes only the power supply’s main outputs to shutdown. If the power supply latches off due to a protection circuit tripping, an AC cycle OFF for 15sec and a PSON # cycle HIGH for 1sec is able to reset the power supply. 13.3.5.1 Current Limit (OCP) The power supply has current limit to prevent the outputs from exceeding the values shown in table below. If the current limits are exceeded the power supply shuts down and latchs off. The latch will be cleared by toggling the PSON # signal or by an AC power interruption. The power supply does not be damaged from repeated power cycling in this condition. 12VSB will be autorecovered after removing OCP limit. Table 92. Over Current Protection Output VOLTAGE Input voltage range Over Current Limits +12V 90 – 264VAC 72A min; 78A max 12VSB 90 – 264VAC 2.5A min; 3.5A max Revision 0.8 Intel Confidential Intel order number G26942-003 Tpwok_low Tpwok_off Tsb_on_delay T pwok_on Tp Tpson_on_delay PSON turn on/off cycle Tpson 125
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Technical Product Specification for Canoe Pass - Preminary - Intel

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