Lab #4: Designing a 4-bit Incrementer & A 4-bit Adder

Computer Architecture I: Digital Design
(03-60265-01 Summer 2005)
Lab #4: Designing a 4-bit Incrementer & A
4-bit Adder/ Subtractor
Name: ID:
Objective: Learning the process of using user-defined modules in Max + Plus II by
(i) Designing a 4-bit Incrementer by using 4 number of the half-adder modules.
(ii) Design the 4-bit Adder/Subtractor explained in Lecture # 7.
DESIGNING THE 4-BIT INCREMENTER, BY USING 4 MODULES OF THE HALF-
ADDER Used in Lab 3:
1. Open Graphic Editor window. Name the file as lab4mod.gdf. Use File
Project Set Project to Current File.
2. Using 4 modules of the Half adder (from lab3.sym file), draw the schematic diagram
of a 4-bit Incrementer.
The four bits of the input to the Incrementer may be called A0, A1, A2 and A3.
The fifth input X has to be equal to 1 for incrementing. If the fifth input be 0, the
circuit will not increment the 4-bit input and will return an output, which is equal to
the input. The outputs of the Incrementer may be called S0, S1, S2, S3 and C.
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3. Express the outputs as functions of the inputs.
S0 =
S1 =
S2 =
S3 =
C =
4. Verify your design of (2) using a simulator. (The X input of the Incrementer
is a constant at 1.) Note: For 4 inputs, an end-time of 100.0 ns with a grid size of 5.0 ns
may be chosen.
5. Obtain the “truth table” for the Incrementer.
6. Design the full Adder/ Subtractor circuit explained in lecture #7 .
Verify your results with the GA/TA.
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