Intel XENIX 286 Programmers Guide (86) - Tenox.tc
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Intel XENIX 286 Programmers Guide (86) - Tenox.tc

Intel XENIX 286 Programmers Guide (86) - Tenox.tc Intel XENIX 286 Programmers Guide (86) - Tenox.tc

tenox.tc
09.06.2013 Views

XENIX Programming as: Assembler Add ressing Modes The XENIX 8086/286 assembler provides many different ways to access instruction operands. Operands may be contained in registers, within the instruction itself, in memory, or in 1/0 ports. In addition, the addresses of memory and 1/0 port operands can be calculated in several different ways. The following sections describe the format and meaning of instruction operands. Register Operands Register operands are the 8086/286 CPU registers. In an instruction, a register operand causes the instruction's action to be performed on the contents of the register. A register operand may be any one of the following: ax ah al bx bh bl ex ch cl dx dh dl di si bp sp cs ds ss es Register operands may be used for the source or destination in an instruction. Since these operands are encoded in a few bits, instructions that specify only register operands are generally the most compact. They are also the fastest, since operations on registers are performed entirely within the CPU. The following are examples of instructions with register operands: sub ax,bx addb ah,dl cmp cs,ds 7-19

as: Assembler XENIX Programming Immediate Operands Immediate operands are byte or word constants given with the instruction itself. These operands have the forms * expression # expression where * specifies a byte constant, # specifies a word constant, and expression is an absolute expression or a symbol that defines the constant's value. Since immediate operands are constants, they cannot be used as the destination operand. Note that the assembler does not check the operand size. The following examples illustrate immediate operands: movb mov ad db ex, *33 ex,#( 1 22/2) ax,*NAME Direct Address Operands Direct address operands are the bytes or words in memory at the given direct addresses. Direct addresses have the form expression where expression is an absolute expression or symbol that resolves to a memory address. The direct address gives the locat ion of the operand in terms of an offset from the beginning of the current segment or the segment in which the given symbol is defined. - Direct address operands may be used for source or destination. Although absolute addresses are allowed, symbols should be used whenever possible. The size of the operand depends on the instruction in which it is used. The following examples illustrate direct address operands: 7-20 mov movb ex, free Darray + 204, * 1

<strong>XENIX</strong> Programming as: Assembler<br />

Add ressing Modes<br />

The <strong>XENIX</strong> 80<strong>86</strong>/<strong>2<strong>86</strong></strong> assembler provides many different ways to access instruction<br />

operands. Operands may be contained in registers, within the instruction itself, in<br />

memory, or in 1/0 ports. In addition, the addresses of memory and 1/0 port operands<br />

can be calculated in several different ways.<br />

The following sections describe the format and meaning of instruction operands.<br />

Register Operands<br />

Register operands are the 80<strong>86</strong>/<strong>2<strong>86</strong></strong> CPU registers. In an instruction, a register operand<br />

causes the instruction's action to be performed on the contents of the register. A<br />

register operand may be any one of the following:<br />

ax ah al<br />

bx bh bl<br />

ex ch cl<br />

dx dh dl<br />

di si bp<br />

sp cs ds<br />

ss es<br />

Register operands may be used for the source or destination in an instruction. Since<br />

these operands are encoded in a few bits, instructions that specify only register<br />

operands are generally the most compact. They are also the fastest, since operations on<br />

registers are performed entirely within the CPU.<br />

The following are examples of instructions with register operands:<br />

sub ax,bx<br />

addb ah,dl<br />

cmp cs,ds<br />

7-19

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