Enhanced Polymer Passivation Layer for Wafer Level Chip Scale ...
Enhanced Polymer Passivation Layer for Wafer Level Chip Scale ...
Enhanced Polymer Passivation Layer for Wafer Level Chip Scale ...
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of solder balls to the holes on the plate; 4) removing the plate after the solder balls<br />
rolled into all the fluxed bumping pads on the substrate; and 5) cleaning the extra<br />
balls if needed. The carrier plate was made from a Si wafer. The pattern of the holes<br />
was fabricated by standard photolithography process and deep reactive-ion etching<br />
(DRIE) (see Figure 3.14). The open size of the holes, 320μm in diameter, was<br />
designed a little larger than the solder sphere size to guarantee a smooth placement<br />
without stuck solder spheres. Figure 3.15 illustrates the placement steps.<br />
Figure 3.14 Carrier plate made by etched Si wafer.<br />
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