Enhanced Polymer Passivation Layer for Wafer Level Chip Scale ...

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2.2.4 Reliability ....................................................................................................... 22 2.2.5 Current approaches to improve reliability ..................................................... 24 2.3 Solder Bracing Technology ...................................................................................... 28 2.3.1 Protection Options ......................................................................................... 28 2.3.2 PolymerCollar WLP ......................................................................................... 29 2.3.3 Processing of SolderBrace Material................................................................. 30 2.3.4 Optimized SolderBrace Material developed by Lord Corporation .................. 33 2.4 Summary ................................................................................................................... 34 Chapter 3 WLCSP Die Fabrication ........................................................................................... 35 3.1 Test Die Dimension ................................................................................................ 35 3.2 Standard Die Fabrication ......................................................................................... 36 3.3 Preparation of SolderBrace Material ....................................................................... 45 3.4 SolderBracing Die Fabrication Process .................................................................... 48 3.4.1 Coating Method ............................................................................................... 48 3.4.2 Printing Method ............................................................................................... 69 Chapter 4 WLCSP PCB Assembly and Test Results.................................................................. 76 4.1 Wafer Singulation ..................................................................................................... 76 4.2 WLCSP-PCB Assembly .......................................................................................... 78 4.2.1 Test Vehicle .................................................................................................... 78 4.2.2 Die Placement .................................................................................................. 80 4.2.3 Reflow ............................................................................................................. 81 4.2.4 X-Ray Inspection ............................................................................................. 83 4.3 Reliability Test .......................................................................................................... 84 vi
4.4 Failure Analysis ........................................................................................................ 89 Chapter 5 Finite Element Analysis ............................................................................................. 93 5.1 Finite Element Analysis (FEA) models .................................................................... 93 5.1.1 Modeling Approaches ...................................................................................... 95 5.1.2 Material Properties ........................................................................................... 99 5.1.3 Constitutive Models for SnAgCu Solder ......................................................... 99 5.1.4 Solder-fatigue life Models ............................................................................. 104 5.2 Modeling Procedure ................................................................................................ 107 5.2.1 Geometry........................................................................................................ 107 5.2.2 Material Properties ......................................................................................... 110 5.2.3 Meshing.......................................................................................................... 111 5.2.4 Boundary Conditions ..................................................................................... 112 5.2.5 Thermal Loading ............................................................................................ 114 5.2.6 Fatigue Model Results ................................................................................... 115 5.2.7 Thermal Fatigue Life Prediction of Solderbrace-coated Solder Joints .......... 117 Chapter 6 Conclusion ................................................................................................................ 119 References ................................................................................................................................. 121 vii
Page 1 and 2: Enhanced Polymer Passivation Layer
Page 3 and 4: SolderBrace coatings were low tempe
Page 5: Table of Contents Abstract ........
Page 9 and 10: List of Figures Figure 1.1 Trends i
Page 11 and 12: Figure 3.17 SAC305 Reflow profile .
Page 13 and 14: CHAPTER 1 INTRODUCTION In the era o
Page 15 and 16: This effect changes the package to
Page 17 and 18: 1.4 Solder Joint Fatigue Figure 1.2
Page 19 and 20: leading to the solder joint failure
Page 21 and 22: umped wafers. The coating is stenci
Page 23 and 24: 11 Bumped Wafer Print over ball Pre
Page 25 and 26: 2.1 Chip Scale Package Technology C
Page 27 and 28: Mountable with conventional assembl
Page 29 and 30: Figure 2.3 Cross section of a typic
Page 31 and 32: Table 2.1 Comparison between tradit
Page 33 and 34: In-Situ Bumped Wafers Placed Prefor
Page 35 and 36: of solder joint failure, and they o
Page 37 and 38: (a) (b) Figure 2.8(a). Metalized ph
Page 39 and 40: "underfilled" structure distributes
Page 41 and 42: have generally been the modificatio
Page 43 and 44: are “low temperature” wafer lev
Page 45 and 46: 2.3.4 Optimized SolderBrace Materia
Page 47 and 48: CHAPTER 3 WLCSP DIE FABRCIATION In
Page 49 and 50: Table 3.1 Test Die used for Reliabi
Page 51 and 52: Figure 3.4 Fabrication Process Flow
Page 53 and 54: spin coating. A layer of light sens
Page 55 and 56: layer, is investigated as a potenti
Page 57 and 58:
10. Final cleaning: After the passi
Page 59 and 60:
Cyclopentanone, a colorless liquid
Page 61 and 62:
used to check the basic spin and ph
Page 63 and 64:
Figure 3.7 SolderBrace film thickne
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6. Post-UV exposure bake: This step
Page 67 and 68:
8. Pattern characterization: The su
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offers the optimum flux release cha
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fatigue resistance, lower cost SAC
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Figure 3.12 Solder Ball Placement M
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of solder balls to the holes on the
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of thermal shock. If the temperatur
Page 79 and 80:
Figure 3.17 SAC305 Reflow profile -
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foaming and high performance cleane
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- Polish clean: used the optimized
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Figure 3.22 SolderBrace printed waf
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Voids Figure 3.25 SolderBrace Mater
Page 89 and 90:
cutting speed was set at a low valu
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Figure 4.2 Process Flow of Board As
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pitch, and bump diameter), and subs
Page 95 and 96:
4.2.4 X-Ray Inspection Figure 4.5 R
Page 97 and 98:
Figure 4.6 Air to air thermal cycli
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Figure 4.7 Thermal Cycling Setup 87
Page 101 and 102:
4.4 Failure Analysis The main purpo
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Figure 4.10 Pad cratering failure o
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CHAPTER 5 FINITE ELEMENT ANALYSIS I
Page 107 and 108:
5.1.1 Modeling Approaches Due to th
Page 109 and 110:
are shown in Figure 5.2. However, t
Page 111 and 112:
5.1.2 Material Properties Many pack
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strain rate sensitivity. The evolut
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Morris et a1 [96] used a double pow
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focus on the time-dependent effects
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5.2 Modeling Procedure In this proj
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Figure 5.6 The diagonal symmetry mo
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5.2.3 Meshing Table 5.2 Anand const
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direction, but that the surface is
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PREP7 tref,398 ! set zero strain te
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5.2.7 Thermal Fatigue Life Predicti
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CHAPTER 6 CONCLUSIONS Wafer level c
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References 1. Future Trends in Elec
Page 135 and 136:
23. Electronic Packaging and Interc
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48. Ultra Low Stress and Low Temper
Page 139 and 140:
70. Factors for Successful Wafer-Le
Page 141 and 142:
92. Microstructural Dependendence o
Page 143:
111. Nonlinear Analysis of Full Mat
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