Enhanced Polymer Passivation Layer for Wafer Level Chip Scale ...
Enhanced Polymer Passivation Layer for Wafer Level Chip Scale ...
Enhanced Polymer Passivation Layer for Wafer Level Chip Scale ...
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Figure 3.4 Fabrication Process Flow of Die B<br />
The fabrication process flow of die A and die B are illustrated in Figure 3.3 and Figure 3.4. Detail steps<br />
are as follows:<br />
1. <strong>Wafer</strong> cleaning: Prior to use, the 4 inch wafer was first chemically cleaned to remove<br />
ionic, organic, or metallic impurities from the silicon surface. Table 3.2 details the<br />
cleaning process used in this research. Throughout the wafer cleaning and the<br />
microelectronic fabrication process, deionized (DI) water was used as a final rinse.<br />
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