Enhanced Polymer Passivation Layer for Wafer Level Chip Scale ...

3.2 Standard Die Fabrication
Figure 3.1 6mm x 6mm daisy chained test die
Two types of test dies were designed and fabricated as summarized in Table 3.1. Die A was
built for initial process development while die B was optimized to improving the device
reliability. Figure 3.2 shows a piece of patterned wafer with the dielectric layer and metal pads.
Each singulated die could be either used as a standard die (control sample die) or the starting
point for a SolderBrace die.
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