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Enhanced Polymer Passivation Layer for Wafer Level Chip Scale ...

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2.2.5 Current approaches to improve reliability<br />

An extensive amount of work, focused on improving the reliability of WLCSP, has been<br />

developed to reduce shear stresses in the solder joints, especially <strong>for</strong> the large die application<br />

with WLCSP technology.<br />

One of the improvements is the application of the soft stress buffer layer (SBL) structure<br />

which is <strong>for</strong>med under the solder bumps to reduce the shear stress in the solder joints [44-47].<br />

This thick SBL coated on the die side can enhance packaging reliability, but the manufacturing<br />

process is difficult and the production cost is high. The silicone material introduced by IMEC<br />

research center is one example that is able to absorb de<strong>for</strong>mations and reduce stresses created in<br />

the device by the CTE mismatches of different materials. These patternable silicones were<br />

integrated into a silicone under bump (SUB) design which improved the solder joint reliability<br />

through reduction of the strain experienced by the solder. Figure 2.7 shows a schematic view of<br />

SUB configuration. The process protocols <strong>for</strong> building a silicone under the bump wafer level<br />

package using both photo-patternable silicones and printable silicones (see Figure 2.8) [48].<br />

SUB<br />

Figure 2.7 Illustration of SUB build-up<br />

24

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