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Enhanced Polymer Passivation Layer for Wafer Level Chip Scale ...

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Figure 2.3 Cross section of a typical Polyimide-RDL WLCSP [28]<br />

WLCSP combines the conventional chip scale package advantages of thinning,<br />

miniaturizing, low mass packaged chips, and ease of handling with an efficient volume<br />

production approach based upon batch packaging at the wafer level [30]. Table 2.1 compares the<br />

differences between traditional packaging and wafer level packaging [8].<br />

Many companies around the world are developing or have begun providing devices<br />

packaged in chip size fashion. Amkor, Fujitsu, Shell Case, <strong>Chip</strong> <strong>Scale</strong>, Oki, Unitive, Flip <strong>Chip</strong><br />

Technologies (FCT), Fraunhoffer Technical University, Tessera, and some other companies have<br />

all shown diligence in the area [8]. Although all of these technologies result in packaged area<br />

array chips, the technologies still differ, sometimes significantly, in processing steps such as<br />

redistribution technologies, encapsulated technologies, and flex tape technologies. Table 2.2 lists<br />

and compares the key process features <strong>for</strong> most of manufactures [6] while Figure 2.4 shows<br />

some of their products such as (1). The Casio Wrist Camera with super CSP 48 developed by<br />

Fuji, (2). The Ultra CSP by Flip chip International, (3). The National Semiconductor Micro-<br />

SMD, (4). The Ericsson Bluetooth, and (5). The Tessera <strong>Wafer</strong>-<strong>Level</strong> Camera (WLC)<br />

technologies.<br />

17

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