Enhanced Polymer Passivation Layer for Wafer Level Chip Scale ...

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cycles for the crack to propagate across a solder joints diameter. The number of cycles before crack initiation N0 is calculated as: N CW 0 1 C2 ave 106 (5-9) where ∆Wave is the incremental inelastic energy per cycle at the stable cycle, and at the solder joint in concern, C1 and C2 are constants. The crack growth rate (da/dN) per cycle was also calculated in the similar equation as: d dN C W (5-10) C4 a 3 ave and the total number of cycles before failure (Na) can thus be written as: a Na N (5-11) 0 d dN a where a is the total distance the crack has to travel before failure. For a solder joint, it can be conveniently interpreted as the solder diameter at the solder die interface. The viscoplastic strain energy density ∆Wave (in psi) is defined by averaged quantity across the element along the solder joint interface where the crack propagates. Because Darveauxs model was developed in English Unit, the unit of a and ∆Wave have been converted from a Metric Unit (mm and MPa) to an English Unit (in and psi) during the calculation of the fatigue life prediction. ∆Wave was introduced and defined by: W n i1 ave n dWV i1 V i i i (5-12) where dWi is the incremental inelastic energy of element i at the first stable cycle, n is the total number of elements considered and Vi is the calculated volume of element i.
5.2 Modeling Procedure In this project, all packages were subjected to thermal cycle testing and modeled in the ANSYS V.11.0 finite element program. The thermal cycle environment was simulated and the finite element model was validated with the actual thermal cycling results. The goal of the modeling effort was to achieve good correlation between the actual testing failure mode and simulation failure mode for the two different packages fabricated in this research: standard WLCSP and SolderBrace material coated WLCSP. As mentioned in the previous sections, the construction of a finite element model is mainly composed of the consideration of the package geometry, the material properties, the mesh, and the loading profile. Several assumptions were specified in the simulation such as uniform temperature distribution in the package, no initial residual stress, no transient heat transfer, and gradually applied temperature loading. 5.2.1 Geometry A 6x6 mm, 36-ball (6x6 Full Matrix) package was analyzed in this study. The schematic representation of the assembly (standard and SolderBrace-coated WLCSP) is shown in Figure 5.5, where different structural elements and their relative positions have been identified. All the UBM, soldermask and cupper pads were omitted in the simulation for simplicity. 107
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Enhanced Polymer Passivation Layer
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SolderBrace coatings were low tempe
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Table of Contents Abstract ........
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4.4 Failure Analysis ..............
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List of Figures Figure 1.1 Trends i
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Figure 3.17 SAC305 Reflow profile .
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CHAPTER 1 INTRODUCTION In the era o
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This effect changes the package to
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1.4 Solder Joint Fatigue Figure 1.2
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leading to the solder joint failure
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umped wafers. The coating is stenci
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11 Bumped Wafer Print over ball Pre
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2.1 Chip Scale Package Technology C
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Mountable with conventional assembl
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Figure 2.3 Cross section of a typic
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Table 2.1 Comparison between tradit
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In-Situ Bumped Wafers Placed Prefor
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of solder joint failure, and they o
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(a) (b) Figure 2.8(a). Metalized ph
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"underfilled" structure distributes
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have generally been the modificatio
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are “low temperature” wafer lev
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2.3.4 Optimized SolderBrace Materia
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CHAPTER 3 WLCSP DIE FABRCIATION In
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Table 3.1 Test Die used for Reliabi
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Figure 3.4 Fabrication Process Flow
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spin coating. A layer of light sens
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layer, is investigated as a potenti
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10. Final cleaning: After the passi
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Cyclopentanone, a colorless liquid
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used to check the basic spin and ph
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Figure 3.7 SolderBrace film thickne
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6. Post-UV exposure bake: This step
Page 67 and 68: 8. Pattern characterization: The su
Page 69 and 70: offers the optimum flux release cha
Page 71 and 72: fatigue resistance, lower cost SAC
Page 73 and 74: Figure 3.12 Solder Ball Placement M
Page 75 and 76: of solder balls to the holes on the
Page 77 and 78: of thermal shock. If the temperatur
Page 79 and 80: Figure 3.17 SAC305 Reflow profile -
Page 81 and 82: foaming and high performance cleane
Page 83 and 84: - Polish clean: used the optimized
Page 85 and 86: Figure 3.22 SolderBrace printed waf
Page 87 and 88: Voids Figure 3.25 SolderBrace Mater
Page 89 and 90: cutting speed was set at a low valu
Page 91 and 92: Figure 4.2 Process Flow of Board As
Page 93 and 94: pitch, and bump diameter), and subs
Page 95 and 96: 4.2.4 X-Ray Inspection Figure 4.5 R
Page 97 and 98: Figure 4.6 Air to air thermal cycli
Page 99 and 100: Figure 4.7 Thermal Cycling Setup 87
Page 101 and 102: 4.4 Failure Analysis The main purpo
Page 103 and 104: Figure 4.10 Pad cratering failure o
Page 105 and 106: CHAPTER 5 FINITE ELEMENT ANALYSIS I
Page 107 and 108: 5.1.1 Modeling Approaches Due to th
Page 109 and 110: are shown in Figure 5.2. However, t
Page 111 and 112: 5.1.2 Material Properties Many pack
Page 113 and 114: strain rate sensitivity. The evolut
Page 115 and 116: Morris et a1 [96] used a double pow
Page 117: focus on the time-dependent effects
Page 121 and 122: Figure 5.6 The diagonal symmetry mo
Page 123 and 124: 5.2.3 Meshing Table 5.2 Anand const
Page 125 and 126: direction, but that the surface is
Page 127 and 128: PREP7 tref,398 ! set zero strain te
Page 129 and 130: 5.2.7 Thermal Fatigue Life Predicti
Page 131 and 132: CHAPTER 6 CONCLUSIONS Wafer level c
Page 133 and 134: References 1. Future Trends in Elec
Page 135 and 136: 23. Electronic Packaging and Interc
Page 137 and 138: 48. Ultra Low Stress and Low Temper
Page 139 and 140: 70. Factors for Successful Wafer-Le
Page 141 and 142: 92. Microstructural Dependendence o
Page 143: 111. Nonlinear Analysis of Full Mat
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