Enhanced Polymer Passivation Layer for Wafer Level Chip Scale ...

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elow, where is the total strain rate (1/sec), is the stress (MPa), E is the elastic modulus, T is the temperature, n is 1Mpa, A1 is 4.0 x10 -7 1/sec and A2 is 1.0 x 10 -12 1/sec, D1 is 3223 exp T and D2 7348 is exp . The second term in the equation (5-5) represents the T climb controlled creep strain and the third term represents the combined glide/climb strain. Syed [93] has applied this creep model to develop a fatigue life model for SnAgCu solders. 3 12 AD 1 1 AD 2 2 E n n 102 (5-5) Zhang et a1. [94] and Schubert et a1. [95] generated data from different sources and from their own testing on different compositions of SnAgCu solder. They both modeled the steady state creep behavior using the hyperbolic sine function, and postulated the high stress region as a power law break-down region. The constitutive model proposed by both of them predicted very similar behavior at low stresses but start diverging at higher stresses. On the other hand, the model proposed by Wiese et a1. [92] predicts lower creep rate at low stresses. Figure 5.4 compares the creep curves for SAC solder from different constitutive models as mentioned here. Equation (5-6) represent the constitutive model of Schubert and Zhang, where A1 = 277984 s -1 , =0.02447MPa -1 , n=6.41, H1/k =6500, E(MPa)=61251-58.5T( o K), CTE=20ppm/K, Poisson’s ration = 0.36 . H kT n 1 cr A1 sinh exp (5-6)
Morris et a1 [96] used a double power law constitutive model to represent creep data on single lap shear specimens of SAC305 solder joints. The stress exponents of 6.6 and 10.7 were suggested for the low and high stress regions. Figure 5.4 Comparison of Creep Models for SnAgCu and SnPb solder [92] Elastic-Plastic-Creep Model: Pang et al. [97], Yang et al. [98], Vandevelde et al. [99], and Qian et al. [100] used the bilinear elastic-plastic and hyperbolic sine creep equation to describe the solder deformation response. This approach uses separate constitutive models for time independent plastic deformation and time-dependent creep deformation. The solder is modeled as an elastic- plastic-creep material with temperature and strain rate dependent Young modulus and yield stress material properties expressed by following equations [101]: 103
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Enhanced Polymer Passivation Layer
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SolderBrace coatings were low tempe
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Table of Contents Abstract ........
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4.4 Failure Analysis ..............
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List of Figures Figure 1.1 Trends i
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Figure 3.17 SAC305 Reflow profile .
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CHAPTER 1 INTRODUCTION In the era o
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This effect changes the package to
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1.4 Solder Joint Fatigue Figure 1.2
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leading to the solder joint failure
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umped wafers. The coating is stenci
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11 Bumped Wafer Print over ball Pre
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2.1 Chip Scale Package Technology C
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Mountable with conventional assembl
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Figure 2.3 Cross section of a typic
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Table 2.1 Comparison between tradit
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In-Situ Bumped Wafers Placed Prefor
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of solder joint failure, and they o
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(a) (b) Figure 2.8(a). Metalized ph
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"underfilled" structure distributes
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have generally been the modificatio
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are “low temperature” wafer lev
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2.3.4 Optimized SolderBrace Materia
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CHAPTER 3 WLCSP DIE FABRCIATION In
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Table 3.1 Test Die used for Reliabi
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Figure 3.4 Fabrication Process Flow
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spin coating. A layer of light sens
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layer, is investigated as a potenti
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10. Final cleaning: After the passi
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Cyclopentanone, a colorless liquid
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used to check the basic spin and ph
Page 63 and 64: Figure 3.7 SolderBrace film thickne
Page 65 and 66: 6. Post-UV exposure bake: This step
Page 67 and 68: 8. Pattern characterization: The su
Page 69 and 70: offers the optimum flux release cha
Page 71 and 72: fatigue resistance, lower cost SAC
Page 73 and 74: Figure 3.12 Solder Ball Placement M
Page 75 and 76: of solder balls to the holes on the
Page 77 and 78: of thermal shock. If the temperatur
Page 79 and 80: Figure 3.17 SAC305 Reflow profile -
Page 81 and 82: foaming and high performance cleane
Page 83 and 84: - Polish clean: used the optimized
Page 85 and 86: Figure 3.22 SolderBrace printed waf
Page 87 and 88: Voids Figure 3.25 SolderBrace Mater
Page 89 and 90: cutting speed was set at a low valu
Page 91 and 92: Figure 4.2 Process Flow of Board As
Page 93 and 94: pitch, and bump diameter), and subs
Page 95 and 96: 4.2.4 X-Ray Inspection Figure 4.5 R
Page 97 and 98: Figure 4.6 Air to air thermal cycli
Page 99 and 100: Figure 4.7 Thermal Cycling Setup 87
Page 101 and 102: 4.4 Failure Analysis The main purpo
Page 103 and 104: Figure 4.10 Pad cratering failure o
Page 105 and 106: CHAPTER 5 FINITE ELEMENT ANALYSIS I
Page 107 and 108: 5.1.1 Modeling Approaches Due to th
Page 109 and 110: are shown in Figure 5.2. However, t
Page 111 and 112: 5.1.2 Material Properties Many pack
Page 113: strain rate sensitivity. The evolut
Page 117 and 118: focus on the time-dependent effects
Page 119 and 120: 5.2 Modeling Procedure In this proj
Page 121 and 122: Figure 5.6 The diagonal symmetry mo
Page 123 and 124: 5.2.3 Meshing Table 5.2 Anand const
Page 125 and 126: direction, but that the surface is
Page 127 and 128: PREP7 tref,398 ! set zero strain te
Page 129 and 130: 5.2.7 Thermal Fatigue Life Predicti
Page 131 and 132: CHAPTER 6 CONCLUSIONS Wafer level c
Page 133 and 134: References 1. Future Trends in Elec
Page 135 and 136: 23. Electronic Packaging and Interc
Page 137 and 138: 48. Ultra Low Stress and Low Temper
Page 139 and 140: 70. Factors for Successful Wafer-Le
Page 141 and 142: 92. Microstructural Dependendence o
Page 143: 111. Nonlinear Analysis of Full Mat
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Enhanced Polymer Passivation Layer for Wafer Level Chip Scale ...

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