Enhanced Polymer Passivation Layer for Wafer Level Chip Scale ...

Failure analysis techniques can be classified with non-destructive analysis and destructive
analysis. The non-destructive evaluation will not damage the test sample and uses techniques
such as X-ray inspection and C-mode scanning acoustic microscopy (C-SAM). In this research,
destructive analysis was performed to determine the solder bump failure mechanism. The test
sample was cut from the test board, molded in room temperature cure epoxy resin, and carefully
ground and polished to the desired cross sectional interface. The sample was inspected with a
microscope periodically during polishing to ensure the proper polishing depth was achieved to
reveal the desired cross section. After polishing the surface of the test sample smooth, a scanning
electron microscope (SEM) was used to observe and evaluate the micro-structure. Figure 4.10
shows the silicon cratering failure mode of the non-coated dies after thermal cycling test. Silicon
cratering is a fracture within the silicon, typically manifesting under the bump. The fracture can
be caused by the bumping/WLP process, the assembly process, or the excessive mechanical
stresses on the bond pads during thermal cycling. There was no evidence of cratering is as-
assembled WLCSPs.
The failure mode for the SolderBrace coated WLCSPs was observed to be the thermal
fatigue crack formation and propagation in the solder near the pad surface on the package side of
the joint as shown in Figure 4.11. This micrograph clearly shows failure occurred by thermal
fatigue crack propagation. The solder bump surface did not deform during thermal cycling.
Finite element analysis was used to investigate the thermal stress induced inside both of
the packages. Details are discussed in Chapter 5. The simulation results provide insight into
the stress generation and provide guidance on appropriate design changes.
90