Enhanced Polymer Passivation Layer for Wafer Level Chip Scale ...

Figure 2.11 Schematic process flow of the double ball redistribution and
Bumping technology ……………………………………………………………...28
Figure 2.12 PolymerCollar WLP (a), and a cleaved section of Polymer Collar WLP (b) ........ 30
Figure 2.13 Process flow of a laser ablated coating-type wafer level solder brace ................. .31
Figure 2.14 Process flow of a back grind and double bump coating-type wafer level
solder brace ............................................................................................................. 32
Figure 2.15 Application method of SolderBrace by photo definition ...................................... 32
Figure 2.16 Cross section of a WLCSP 250µm solder bump supported by the thick
front-side passivation SolderBrace ......................................................................... 33
Figure 3.1 6mm x 6mm daisy chained test die ........................................................................... 36
Figure 3.2 Wafer of WLCSPs without SolderBrace coating and WLCSP close-up view ......... 37
Figure 3.3 Fabrication Process Flowof Die A ........................................................................... 38
Figure 3.4 Fabrication Process Flow of Die B .......................................................................... 39
Figure 3.5 Delaminated surface coatings (a) and good surface coatings (b) .............................. 48
Figure 3.6 Process flow of UV defined SolderBrace bumping sites and ball placement .......... 50
Figure 3.7 SolderBrace film thicknesses as a function of spin speed ........................................ 51
Figure 3.8 Pattern for SolderBrace coating ................................................................................ 53
Figure 3.9 Exposure time vs. Aperture Size .............................................................................. 54
Figure 3.10 Cross-section of the open vias ................................................................................ 55
Figure 3.11 Supported structure around solder balls formed by no-flow flux .......................... 56
Figure 3.12 Solder Ball Placement Method by DEK .................................................................. 61
Figure 3.13 Wafer Level Solder Sphere Transfer Process Flow .............................................. 62
Figure 3.14 Carrier plate made by etched Si wafer. ................................................................. 63
Figure 3.15 Solder ball placement method developed in this research ...................................... 64
Figure 3.16 Schematic of the four zones of reflow soldering ..................................................... 65
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