Verification of Parameterised FPGA Circuit Descriptions with Layout ...

CHAPTER 4. VERIFYING CIRCUIT LAYOUTS 80
Quartz AST
Lexer/
Parser
Preprocessed
Quartz
Preprocessor
Quartz
Input
Type Processing
Identifier
Conversion
Type
Inference
Overloading
Resolution
Full Instantiation
Placement checks
Find dependencies
for composites
Generate HOL
for composites
Generate
Isabelle scripts
Layout Processing
Isabelle Module
Size Inference
Generate HOL
for primitives
Generate proof
goals
Generate
Tacticals
Isabelle
input
Pretty
printer
Figure 4.7: Functions of the Quartz compiler in layout verification mode
The Isabelle module is the only part of the compiler process that is specific to Isabelle.
It generates Isabelle/HOL proof scripts using the correct syntax and outputs them to disk
where they can be loaded by Isabelle. The Isabelle module also does its best to automatically
generate input to Isabelle’s automatic proof tools, this is described in Section 4.6.
Where blocks are part of a library and have already had their layouts proved the compiler
does not generate proof scripts, assuming that these scripts are available for loading into the
theorem prover from elsewhere. This is controlled by a special “layout-proved” attribute that
can be attached to blocks.
4.5.2 Generating Definitions
Given the model developed in the previous section, Isabelle/HOL expressions with the ex-
panded functionality of the QuartzLayout Functions library now essentially implement a
super-set of Quartz expressions - it is therefore possible to translate Quartz expressions into
Isabelle/HOL directly merely by re-writing syntax as necessary.
Quartz blocks and the statements that they are composed of must be translated into their
semantic interpretations. We assign a particular semantic interpretation to each statement
type, recursively defined as necessary (for example, for loop statements) and describe a block
as the logical conjunction of its statement semantics. This process is syntax-directed and