Verification of Parameterised FPGA Circuit Descriptions with Layout ...

CHAPTER 3. GENERATING PARAMETERISED LIBRARIES WITH LAYOUT 64
and then used to combine blocks with the explicit co-ordinates hidden. Some examples of
full circuits described and laid out using this framework can be found in Chapter 6.
The Quartz layout infrastructure is, to our knowledge, unique in supporting both iterative and
recursive constructs and the compilation of designer-specified combinators into parameterised
output.
Systems based around Ruby [26] and Lava [7] have been used to exploit the geometric in-
terpretation of higher-order combinators to generate placed circuits, however both generate
flattened netlists not parameterised output. Neither support for loop iteration constructs,
although this is somewhat less relevant since they are not being compiled into a form that
relies heavily on iteration (VHDL).
Pebble [49, 50] has been extended with below and beside relative placement language con-
structs and a procedure for the conversion from relative to explicit co-ordinates has been
formally analysed. This approach allows the generation of parameterised output and ensures
that components can not overlap, however it is somewhat limiting in that it does not support
mixing absolute and relative placement information in a single description and can not de-
scribe pathological examples such as the irregular grid arrangement illustrated in Chapter 1.
Furthermore, the generated placements are not necessarily as compact as possible, although
this can be improved through the use of partial evaluation. The Pebble approach of building
relative placement constructs into the language rather than allowing them to be user-defined
as Quartz permits through its higher-order combinators is inherently more limited, although
necessarily so since Pebble is not a high-order language.