Verification of Parameterised FPGA Circuit Descriptions with Layout ...

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CHAPTER 3. GENERATING PARAMETERISED LIBRARIES WITH LAYOUT 56 Quartz AST Lexer/ Parser Preprocessed Quartz Preprocessor Quartz Input Type Processing Identifier Conversion Type Inference Overloading Resolution Full Instantiation Layout Processing Placement checks Size Inference Layout Verification Pebble Output Direction Processing Direction Inference Direction Concreting Directional Instantiation Pretty printer Distillation Block Analysis Translation / Unwinding Layout Generation Identifier Selection Pebble AST Figure 3.16: Modified compiler architecture for compiling Quartz designs with layout information To achieve this, the Pebble 5 language must be extended to enable the evaluation of the more complex expressions that can be generated by Quartz compilation. We describe this extended Pebble as LE-Pebble (Layout-Enhanced Pebble). The expressions supported by the Pebble 5 language are essentially the same as those of Quartz before the new functions were added to support layout. LE-Pebble differs in that the standard expressions must be augmented with max, maxf, sum and if expression types. In practice we will be able to eliminate these constructs when compiling from Quartz to Pebble in many cases, however in the general case they are still required. LE-Pebble does not require height() and width() functions, these will be eliminated during compilation and replaced with appropriate simple expressions. The Quartz compilation framework is extended as shown in Figure 3.16 to support the compilation of designs with layout information. 3.7.1 Changes to the Type Processing Module In the standard compiler framework the type processing module carries out type checking on the Quartz input, using a derivative of the Hindley/Milner algorithm [14, 53]. The type
CHAPTER 3. GENERATING PARAMETERISED LIBRARIES WITH LAYOUT 57 processor also resolves overloading using an algorithm based around satisfiability matrix predicates [64]. The standard output of the type processing module is a monomorphic, annotated AST with multiple copies of polymorphic blocks instantiated for each utilised type. This output is suitable for the standard later stages of the compiler, however for placed Quartz compilation we need to insert a new layout processing module between the type processor and direction processor. This requires significant changes to the type processor to split the instantiation stage in two, one part that resolves overloading and the other that removes all polymorphism. Since different overloaded instances of Quartz blocks can have different size expressions it is necessary to resolve overloading prior to layout generation or layout verification. This is achieved by the new “overloading resolution” stage within the type processor which replaces references to overloaded blocks with references to specific instances, instantiating new copies of blocks which use different overloaded instances on different occasions. This non-overloaded but still polymorphic Quartz AST is then passed to the layout processing module. After layout processing, the type processor completes the process of generating monomorphic Quartz by eliminating all polymorphic types. 3.7.2 Layout Processing Module The layout processing module, despite its name, does not take full responsibility for compiling layout information in Quartz descriptions. It is responsible for initial processing of layout information and preparation for later stages. If the compiler is invoked on a design and is not requested to generate placed output the layout processing module strips all size attributes and placement information from blocks. The modified circuit design is then passed to the later compilation stages. If layout verification or placed output mode is requested then the module checks that there are no unplaced block instantiations within the circuit (unless they are the only instantiation within a block, in which case they are automatically placed at (0, 0)) and then the size inference stage is invoked.
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Imperial College of Science, Techno
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Acknowledgements Firstly, I’d lik
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TABLE OF CONTENTS iv 2.5 Isabelle:
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TABLE OF CONTENTS vi 5.3.1 Speciali
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TABLE OF CONTENTS viii C.1.1 fst .
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Chapter 1 Introduction This thesis
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CHAPTER 1. INTRODUCTION 3 B A C Fig
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Chapter 5 Specialisation In this ch
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CHAPTER 5. SPECIALISATION 117 block
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CHAPTER 5. SPECIALISATION 119 Modif
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CHAPTER 5. SPECIALISATION 123 a fas
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CHAPTER 5. SPECIALISATION 125 block
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CHAPTER 5. SPECIALISATION 127 y y y
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CHAPTER 5. SPECIALISATION 129 with
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CHAPTER 6. LAYOUT CASE STUDIES 131
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CHAPTER 7. CONCLUSION AND FUTURE WO
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Bibliography [1] A. Aggoun and N. B
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BIBLIOGRAPHY 177 [19] H. Gelernter.
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BIBLIOGRAPHY 179 [41] Y. Li and M.
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BIBLIOGRAPHY 181 [60] L. C. Paulson
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BIBLIOGRAPHY 183 [83] J. Voeten. On
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APPENDIX A. QUARTZ LANGUAGE GRAMMAR
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Appendix B Theoretical Basis for La
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APPENDIX B. THEORETICAL BASIS FOR L
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Appendix C Placed Combinator Librar
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APPENDIX C. PLACED COMBINATOR LIBRA
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