Verification of Parameterised FPGA Circuit Descriptions with Layout ...
Verification of Parameterised FPGA Circuit Descriptions with Layout ... Verification of Parameterised FPGA Circuit Descriptions with Layout ...
APPENDIX C. PLACED COMBINATOR LIBRARIES 248 theorem "!! (A::((’t15=>’t16=>bool,’t15=>’t16=>int)block)) (B::((’t18=>’t19=>bool,’ t18=>’t19=>int)block)) (C::((’t21=>’t22=>bool,’t21=>’t22=>int)block)) (D::((’t24 =>’t25=>bool,’t24=>’t25=>int)block)) (E::((’t27=>’t28=>bool,’t27=>’t28=>int) block)) (a1::’t15) (b1::’t18) (c1::’t21) (d1::’t24) (e1::’t27) (a2::’t16) (b2::’ t19) (c2::’t22) (d2::’t25) (e2::’t28). [| Def (a1 ;;; A ;;; a2) ; Def (b1 ;;; B ;;; b2) ; Def (c1 ;;; C ;;; c2) ; Def (d1 ;;; D ;;; d2) ; Def (e1 ;;; E ;;; e2) ; ALL (qs40::’t15) (qs41::’t16). 0 ’t25=>bool,’t24=>’t25=>int)block)) (E::((’t27=>’t28=>bool,’t27=>’t28=>int) block)) (a1::’t15) (b1::’t18) (c1::’t21) (d1::’t24) (e1::’t27) (a2::’t16) (b2::’ t19) (c2::’t22) (d2::’t25) (e2::’t28). [| Def (a1 ;;; A ;;; a2) ; Def (b1 ;;; B ;;; b2) ; Def (c1 ;;; C ;;; c2) ; Def (d1 ;;; D ;;; d2) ; Def (e1 ;;; E ;;; e2) ; ALL (qs40::’t15) (qs41::’t16). 0 ’t25=>bool,’t24=>’t25=>int)block)) (E::((’t27=>’t28=>bool,’t27=>’t28=>int) block)) (a1::’t15) (b1::’t18) (c1::’t21) (d1::’t24) (e1::’t27) (a2::’t16) (b2::’ t19) (c2::’t22) (d2::’t25) (e2::’t28). [| Def (a1 ;;; A ;;; a2) ; Def (b1 ;;; B ;;; b2) ; Def (c1 ;;; C ;;; c2) ; Def (d1 ;;; D ;;; d2) ; Def (e1 ;;; E ;;; e2)
APPENDIX C. PLACED COMBINATOR LIBRARIES 249 ; ALL (qs40::’t15) (qs41::’t16). 0 ’t25=>bool,’t24=>’t25=>int)block)) (E::((’t27=>’t28=>bool,’t27=>’t28=>int) block)) (a1::’t15) (b1::’t18) (c1::’t21) (d1::’t24) (e1::’t27) (a2::’t16) (b2::’ t19) (c2::’t22) (d2::’t25) (e2::’t28). [| Def (a1 ;;; A ;;; a2) ; Def (b1 ;;; B ;;; b2) ; Def (c1 ;;; C ;;; c2) ; Def (d1 ;;; D ;;; d2) ; Def (e1 ;;; E ;;; e2) ; ALL (qs40::’t15) (qs41::’t16). 0 ’t25=>bool,’t24=>’t25=>int)block)) (E::((’t27=>’t28=>bool,’t27=>’t28=>int)
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APPENDIX C. PLACED COMBINATOR LIBRARIES 249<br />
; ALL (qs40::’t15) (qs41::’t16). 0 ’t25=>bool,’t24=>’t25=>int)block)) (E::((’t27=>’t28=>bool,’t27=>’t28=>int)<br />
block)) (a1::’t15) (b1::’t18) (c1::’t21) (d1::’t24) (e1::’t27) (a2::’t16) (b2::’<br />
t19) (c2::’t22) (d2::’t25) (e2::’t28). [| Def (a1 ;;; A ;;; a2) ; Def (b1 ;;; B<br />
;;; b2) ; Def (c1 ;;; C ;;; c2) ; Def (d1 ;;; D ;;; d2) ; Def (e1 ;;; E ;;; e2)<br />
; ALL (qs40::’t15) (qs41::’t16). 0 ’t25=>bool,’t24=>’t25=>int)block)) (E::((’t27=>’t28=>bool,’t27=>’t28=>int)
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