Verification of Parameterised FPGA Circuit Descriptions with Layout ...

CHAPTER 2. BACKGROUND AND RELATED WORK 13
is leading to considerable interest in methods of describing hardware at higher and higher
levels of abstraction. Even though circuits generated from high level descriptions may be
less efficient and have worse performance than those that have been subject to painstaking
low level effort this is often less important than the easier development and shorter time to
market it allows.
One approach to high level description of hardware is to compile imperative languages directly
into hardware. Imperative programming languages specify explicit manipulations of the state
of a computer system through a series of instructions and are commonly used by computer
programmers to write software applications. Unlike in VHDL or other declarative languages,
the designer can concentrate on describing an algorithm in a similar style to a conventional
programming language.
A number of imperative languages have been proposed for hardware description. Handel-C
[12] is a high level imperative language designed to be compiled into hardware. Available as
a commercial system, Handel-C is based on ANSI-C and has extensions provided specifically
for hardware development including explicit declaration of data widths, parallel processing
and communication between parallel elements. Cobble [82] is another imperative language
that allows declarative blocks to be used within imperative programs, allowing the benefits
of low-level and high-level programming styles to be exploited.
Another approach that has been taken is to compile higher-level system models directly into
hardware. The theoretical development of digital signal processing algorithms in particular
is often conducted using mathematical tools like Matlab and systems have been presented for
converting Matlab models into FPGA implementations automatically [36, 57, 58]. Other work
includes graphical tools for composing hardware from block diagrams [56] and compilation
of a domain-specific language for networking applications into FPGAs [37].
SAFL [54] is a functional language for high-level hardware description. Functional pro-
gramming treats computation as the evaluation of mathematical functions, emphasising the
evaluation of expressions rather than the execution of commands. Pure functional languages
encourage the use of formal reasoning about programs and are also characterised by the use
of higher order functions - functions which take other functions as arguments. Functional
languages are often considered to have significant advantages over imperative languages [28]