Verification of Parameterised FPGA Circuit Descriptions with Layout ...

APPENDIX B. THEORETICAL BASIS FOR LAYOUT REASONING 202
lemma impdisj_3of4: "(A --> D) ==> (A --> (B|C|D|E))"
by (auto)
lemma impdisj_4of4: "(A --> E) ==> (A --> (B|C|D|E))"
by (auto)
lemma impdisj_1of2: "(A --> B) ==> (A --> (B|C))"
by auto
lemma impdisj_2of2: "(A --> C) ==> (A --> (B|C))"
by auto
lemma impdisj_12of4: "(A --> (B|C)) ==> (A --> (B|C|D|E))"
by auto
lemma impdisj_34of4: "(A --> (D|E)) ==> (A --> (B|C|D|E))"
by auto
section {* Zero size ranges *}
lemma overlap0: "((0::int)