Verification of Parameterised FPGA Circuit Descriptions with Layout ...

More documents

Recommendations

Info

APPENDIX B. THEORETICAL BASIS FOR LAYOUT REASONING 188 ParallelComposition defines the semantics and layout interpretation of Quartz parallel composition. The theory includes AST rewriting functions to allow Isabelle to parse and pretty-print parallel compositions and also contains proofs of useful properties of parallel composition layouts. Functions defines the maxf and sum functions and includes their correctness proofs and theorems describing a wide range of useful properties. Structures contains theorems that are particularly useful for simplifying proof goals that are formed by certain circuit structures (e.g. horizontal arrays). CompilerSimps contains the proofs of simplification rules used in the Quartz compiler to simplify maxf and sum functions. QuartzLayout is a dummy theory which brings together all dependent theories to be used as the root library. Minf is not included in the QuartzLayout library. It contains definitions and correspon- dance theorems between min and max functions and minf and maxf functions. If expressions using these minimum operators are desired these theorems can be used to rewrite expressions into forms which use purely the max and maxf functions. B.1 IntAlgebra header {* Useful theorems about integers for use in size function reasoning *} theory IntAlgebra = Main: section {* Additional ordering operators *} constdefs grthn:: "[’a::ord, ’a]=>bool" ("(_/ > _)" [50, 51] 50) "grthn == % a b. (b < a)" geq:: "[’a::ord, ’a]=>bool" ("(_/ >= _)" [50, 51] 50) "geq == % a b. (b
APPENDIX B. THEORETICAL BASIS FOR LAYOUT REASONING 189 declare geq_def [simp] section {* Power function for integers *} (* Undefined for negative argument y - result must be an integer *) consts pwr :: "[int,int]=>int" (infixr 60) defs pwr_def: "x pwr y == if y >= 0 then int (nat x ^ nat y) else arbitrary" section {* Reasoning with equality and inequalities *} theorem zless_eq: "(((x::int)
Page 1 and 2:
Imperial College of Science, Techno
Page 3 and 4:
Acknowledgements Firstly, I’d lik
Page 5 and 6:
TABLE OF CONTENTS iv 2.5 Isabelle:
Page 7 and 8:
TABLE OF CONTENTS vi 5.3.1 Speciali
Page 9 and 10:
TABLE OF CONTENTS viii C.1.1 fst .
Page 11 and 12:
Chapter 1 Introduction This thesis
Page 13 and 14:
CHAPTER 1. INTRODUCTION 3 B A C Fig
Page 15 and 16:
CHAPTER 1. INTRODUCTION 5 pler, all
Page 17 and 18:
CHAPTER 2. BACKGROUND AND RELATED W
Page 19 and 20:
Page 21 and 22:
Page 23 and 24:
Page 25 and 26:
Page 27 and 28:
Page 29 and 30:
Page 31 and 32:
Page 33 and 34:
Page 35 and 36:
Page 37 and 38:
Page 39 and 40:
Page 41 and 42:
Page 43 and 44:
Page 45 and 46:
CHAPTER 3. GENERATING PARAMETERISED
Page 47 and 48:
Page 49 and 50:
Page 51 and 52:
Page 53 and 54:
Page 55 and 56:
Page 57 and 58:
Page 59 and 60:
Page 61 and 62:
Page 63 and 64:
Page 65 and 66:
Page 67 and 68:
Page 69 and 70:
Page 71 and 72:
Page 73 and 74:
Page 75 and 76:
Chapter 4 Verifying Circuit Layouts
Page 77 and 78:
CHAPTER 4. VERIFYING CIRCUIT LAYOUT
Page 79 and 80:
Page 81 and 82:
Page 83 and 84:
Page 85 and 86:
Page 87 and 88:
Page 89 and 90:
Page 91 and 92:
Page 93 and 94:
Page 95 and 96:
Page 97 and 98:
Page 99 and 100:
Page 101 and 102:
Page 103 and 104:
Page 105 and 106:
Page 107 and 108:
Page 109 and 110:
Page 111 and 112:
Page 113 and 114:
Page 115 and 116:
Page 117 and 118:
Chapter 5 Specialisation In this ch
Page 119 and 120:
CHAPTER 5. SPECIALISATION 109 opera
Page 121 and 122:
CHAPTER 5. SPECIALISATION 111 // Ha
Page 123 and 124:
CHAPTER 5. SPECIALISATION 113 circu
Page 125 and 126:
CHAPTER 5. SPECIALISATION 115 const
Page 127 and 128:
CHAPTER 5. SPECIALISATION 117 block
Page 129 and 130:
CHAPTER 5. SPECIALISATION 119 Modif
Page 131 and 132:
CHAPTER 5. SPECIALISATION 121 Buffe
Page 133 and 134:
CHAPTER 5. SPECIALISATION 123 a fas
Page 135 and 136:
CHAPTER 5. SPECIALISATION 125 block
Page 137 and 138:
CHAPTER 5. SPECIALISATION 127 y y y
Page 139 and 140:
CHAPTER 5. SPECIALISATION 129 with
Page 141 and 142:
CHAPTER 6. LAYOUT CASE STUDIES 131
Page 143 and 144:
Page 145 and 146:
Page 147 and 148: CHAPTER 6. LAYOUT CASE STUDIES 137
Page 175 and 176: CHAPTER 7. CONCLUSION AND FUTURE WO
Page 185 and 186: Bibliography [1] A. Aggoun and N. B
Page 187 and 188: BIBLIOGRAPHY 177 [19] H. Gelernter.
Page 189 and 190: BIBLIOGRAPHY 179 [41] Y. Li and M.
Page 191 and 192: BIBLIOGRAPHY 181 [60] L. C. Paulson
Page 193 and 194: BIBLIOGRAPHY 183 [83] J. Voeten. On
Page 195 and 196: APPENDIX A. QUARTZ LANGUAGE GRAMMAR
Page 197: Appendix B Theoretical Basis for La
Page 201 and 202: APPENDIX B. THEORETICAL BASIS FOR L
Page 217 and 218: Appendix C Placed Combinator Librar
Page 219 and 220: APPENDIX C. PLACED COMBINATOR LIBRA
Page 249 and 250:
APPENDIX C. PLACED COMBINATOR LIBRA
Page 251 and 252:
Page 253 and 254:
Page 255 and 256:
Page 257 and 258:
Page 259 and 260:
Page 261 and 262:
Page 263 and 264:
Page 265 and 266:
Page 267 and 268:
Page 269 and 270:
Page 271 and 272:
Page 273 and 274:
Page 275 and 276:
Page 277 and 278:
Page 279 and 280:
APPENDIX D. CIRCUIT LAYOUT CASE STU
Page 281 and 282:
Page 283 and 284:
Page 285 and 286:
Page 287 and 288:
Page 289 and 290:
Page 291 and 292:
Page 293 and 294:
Page 295 and 296:
Page 297 and 298:
Page 299 and 300:
Page 301 and 302:
Page 303 and 304:
Page 305 and 306:
Page 307 and 308:
Page 309 and 310:
Page 311 and 312:
Page 313 and 314:
Page 315 and 316:
Page 317 and 318:
Page 319 and 320:
Page 321 and 322:
Page 323 and 324:
Page 325 and 326:
Page 327:
show all

Verification of Parameterised FPGA Circuit Descriptions with Layout ...

Create successful ePaper yourself

Delete template?

Save as template?