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Verification of Parameterised FPGA Circuit Descriptions with Layout ...

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CHAPTER 7. CONCLUSION AND FUTURE WORK 168<br />

7.3 Comparison <strong>with</strong> Related Work<br />

To our knowledge, ours is the only work which addresses the issue <strong>of</strong> generating and verifying<br />

parameterised hardware libraries <strong>with</strong> explicit placement information and support for recur-<br />

sively and iterative described structures. However, other work has taken different approaches<br />

to the problem.<br />

7.3.1 VHDL <strong>with</strong> Explicit Co-ordinates<br />

VHDL and Verilog can be used <strong>with</strong> absolute placement co-ordinates specified using “RLOC”<br />

constraints for Xilinx architectures. VHDL does not provide any particular support for place-<br />

ment in particular, however it can be extended <strong>with</strong> user-defined functions to implement the<br />

equivalent <strong>of</strong> our maxf and sum operations. VHDL does not support higher-order functions,<br />

however, so these would need to be coded explicitly for each hardware arrangement.<br />

Nevertheless, our theorem proving verification framework could be applied to VHDL designs.<br />

The potential for the use <strong>of</strong> a few dozen key theorems to automate pro<strong>of</strong>s is severely reduced<br />

by the lack <strong>of</strong> higher-order functions however theorem proving can still be used to verify<br />

first-order placement co-ordinates. Size functions for each VHDL entity would probably<br />

need to be entered manually, although they could possibly be inferred in a similar way to<br />

Quartz providing a suitable subset <strong>of</strong> the language is used. VHDL allows the combination<br />

<strong>of</strong> behavioural and structural design styles <strong>with</strong>in a single description and if this was done<br />

then verification <strong>of</strong> the correctness <strong>of</strong> entity size functions would probably be impossible<br />

<strong>with</strong>out incorporating a theoretical model <strong>of</strong> how behavioural descriptions are elaborated<br />

into structural hardware.<br />

7.3.2 Relative Placement in Pebble<br />

Pebble has been extended <strong>with</strong> support for relative placement [49]. The Pebble system uses<br />

new language constructs to provide below, beside, below for and beside for capabilities and<br />

a functional specification has been given for a procedure which compiles relative positions<br />

into absolute co-ordinates. The Pebble system is clean and effective at describing many

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