Verification of Parameterised FPGA Circuit Descriptions with Layout ...

CHAPTER 6. LAYOUT CASE STUDIES 158
Matrix 1
Empty matrix
Result matrix
Matrix 2
(a) Matrix multiplier arrangement
x_in
mult
add
z_in
y_in
z_out
(b) Functional cell
Figure 6.23: Implementing a 3D matrix multiplier
N-dimensional circuits have many potential uses in describing operations on multi-dimensional
data and have already been discussed for some applications [42, 43]. They could potentially
be used to provide a quick route for translating imperative for loop algorithms into hard-
ware, extending existing work on mapping nested loop algorithms into multi-dimensional
arrays [39].
In this work we shall concentrate on describing a single circuit, a matrix multiplier, using
the three-dimensional cube combinator.
6.6.3 A 3D Matrix Multiplier
A cubical circuit description can be used to combine two dimensional data and generate a
two dimensional output. This is ideal for describing matrix multiplication as we can describe
a circuit which has data from the two source matrices moving unchanged through the array
while the output matrix is accumulated along a different axis. Figure 6.23(a) illustrates this
arrangement.
The cubical circuit can be made up of cells that function as shown in Figure 6.23(b). Fig-
ure 6.24 shows the Quartz description for the matrix multiplier. Note that the first matrix
must be transposed in order to correctly arrange the elements of the matrix for the circuit,
nevertheless this is an extremely simple description of multiplying a y ×z matrix and a z ×x
matrix to produce a y × x matrix as output.