Verification of Parameterised FPGA Circuit Descriptions with Layout ...

CHAPTER 6. LAYOUT CASE STUDIES 152
domain
(a) Domain & range convention
range
z
y
x
(b) Dimensions
Figure 6.16: Representing three dimensional blocks
2D FPGA but can also be given alternative layout interpretations through manipulation
using correctness-preserving transformations.
6.6.1 A 3D “cube” Combinator
The standard layout interpretation of a Quartz block is as a four sided tile, with two sides
assigned to the domain and two to the range. The assignment of sides to domain and range
and the division into two sides is a convention only. It is important to realise that any
convention is sufficient providing it is consistently applied and we can bear this in mind
when choosing a convention for visualising the three dimensional blocks which make up a
cubical circuit.
Figure 6.16(a) illustrates how we divide the six sides of a cube into a block’s domain and
range. Visualised in this way the block’s top, back and left sides form the domain while the
front, bottom and right form the range. We describe block domains and ranges as tuples of
different dimensions, so the range is described of a tuple of (xs, ys, zs) while the range is a
tuple of (zs, ys, xs). We use the signal xs to describe signals that are travelling along the
x-axis, ys to mean the signals travelling along the y-axis etc. Note that we have extended
the convention of reversing the order of the sides from the 2D case to this 3D case. In the
n-dimensional case a block’s range dimensions should always be expressed in reverse order
from its domain dimensions.
Each side of the cube is itself a two dimensional array of values. This requires some convention
of assigning dimensions, which we do as shown in Figure 6.16(b). This means that the
domain and range signals are assigned the dimensions of: xs[z][y], ys[z][x] and zs[y][x]. This