Verification of Parameterised FPGA Circuit Descriptions with Layout ...

CHAPTER 5. SPECIALISATION 129
with the uncompacted design the freed logic is dispersed throughout the multiplier circuit.
This example demonstrates that compaction can improve performance and we would expect
the performance gain to be much larger for larger circuits where there is more potential for
compaction, even in a larger multiplier circuit.
5.6 Summary
In this chapter we have demonstrated how the Quartz layout infrastructure can be used to
create specialised versions of designs by optimising for particular static inputs.
We have presented the mechanism of distributed specialisation and demonstrated how this
can be used to specialise a ripple adder using the Quartz overloading mechanism. We have
also highlighted the capabilities required to implement an optimal distributed specialisa-
tion system. We have shown how distributed specialisation lends itself to clear and simple
verification in a way that could be easily automated using a theorem prover.
One of the advantages of performing specialisation at the Quartz level is that we are able to
achieve compaction of placed designs. We have demonstrated that this can lead to increased
performance for a specialised multiplication circuit.