Verification of Parameterised FPGA Circuit Descriptions with Layout ...

CHAPTER 5. SPECIALISATION 114
5.2.3 Verifying Distributed Specialisation
In dynamic specialisation applications after the correctness of a general circuit has been
carefully determined, through whatever means, it is vital to ensure that the new circuits
generated by the specialisation system are functionally correct. Since it is not possible to
simulate each new circuit as it is generated the only reasonable approach is to verify the
specialisation process itself.
Distributed specialisation provides a clear and modular approach to the verification prob-
lem. Essentially we rely on the fact that a block with specialisation code should, under all
circumstances, output the same logical value - regardless of how this is computed from static
or dynamic hardware inputs.
This splits the overall task of verifying a specialisation procedure into many smaller and much
simpler tasks: verification of each self-specialising block. In theory it is much worse to have
to verify each new specialising block that is written than to verify a single procedure that
specialises any circuit however in practice we would suggest that this approach is superior.
It is likely that most circuits will rely on self-specialising blocks that have already been
developed and thus will not require further verification. The kind of blocks likely to have
their own specialisation code developed will be library blocks which will should already be
subject to extensive verification effort. If high-level specialisation has been implemented for
blocks in order to increase the speed of processing then this will be functionally identical to
the lower-level specialisation and the lower-level proofs can be used to verify the high-level
specialisation procedure.
Because specialisation is being carried out at the HDL level we do not need to concern
ourselves with details of signal routing and need to perform only a high level functional
verification. By dividing the verification task each individual verification goal will tend to be
quite simple, to the point where we would expect automatic proof tools to be able to achieve
a high level of automation in proving self-specialising blocks automatically.
Figure 5.5 illustrates simple proofs for the partial specialisation and2 and xor2 blocks de-
scribed in Figures 5.2 and 5.4. The hardware primitives have been given HOL semantics
and the partial specialisation blocks described in their expanded HOL form as given by the