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Verification of Parameterised FPGA Circuit Descriptions with Layout ...

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Chapter 5<br />

Specialisation<br />

In this chapter we illustrate how Quartz can be used to create specialised, placed designs when<br />

some input values are known at compile-time. Section 5.1 introduces the benefits <strong>of</strong> design<br />

specialisation and some <strong>of</strong> its applications. In Section 5.2 we illustrate how we can achieve<br />

distributed specialisation transparently using Quartz “clever components” as primitive ele-<br />

ments. In Section 5.3 we discuss the limitations <strong>of</strong> our current infrastructure for distributed<br />

specialisation and outline the requirements for an optimal system, while Section 5.4 discusses<br />

the role <strong>of</strong> specialisation code at a higher-level than primitive components. Section 5.5 illus-<br />

trates high level specialisation <strong>of</strong> a multiplier circuit and evaluates the performance impact<br />

<strong>of</strong> compacting designs when logic is optimised away. Section 5.6 summarises this chapter.<br />

5.1 Introduction<br />

Design specialisation is a useful tool that can be used to optimise the performance <strong>of</strong> digital<br />

circuits when the values <strong>of</strong> some inputs are known. It is something that is so commonly used<br />

in circuit design as to almost not be worth mentioning <strong>with</strong> simple optimisations such as<br />

replacing a full multiplier by a constant co-efficient multiplier when one input is fixed or, at<br />

a meta-level, the choice <strong>of</strong> selecting a multiplier implementation rather than a full ALU for<br />

a circuit that will only perform multiplication.<br />

Typically most design specialisation is static specialisation - a design-time optimisation that<br />

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