Verification of Parameterised FPGA Circuit Descriptions with Layout ...

Verification of Parameterised FPGA Circuit Descriptions with Layout ... Verification of Parameterised FPGA Circuit Descriptions with Layout ...

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CHAPTER 4. VERIFYING CIRCUIT LAYOUTS 102 B C A D Figure 4.20: The surround combinator Appendix C.4 gives the Quartz description and correctness proof for this combinator’s layout. Validity of height and width expressions are proved by auto configured to expand let defin- itions and using Theorem 11 (z aleq bc). Containment proofs can also most be completed purely by auto however one requires the use of a variant of Theorem 9. The true value of the verification methodology comes into play with the intersection proofs. Once again, these are proved entirely automatically using purely auto - however the error that was discovered in the layout was discovered because an intersection theorem was not proved. The error was that C was naively placed with its y co-ordinate defined by heightA+heightD however this did not take into account of the fact that it was possible for it to overlap block E under some circumstances. A simple correction to define the y co-ordinate as the maximum of the height of E or A and D was sufficient to produce a valid layout. This is still a relatively simple layout for this combinator. A more complex layout description could use conditionals to compare the heights and widths of the various blocks and adjust their relative placement accordingly (for example, the B and E blocks could be aligned with the bottom of the combinator as a whole rather than the bottom of the A block if they have a greater height than A). E

CHAPTER 4. VERIFYING CIRCUIT LAYOUTS 103 4.8 Discussion Our approach to layout verification is effective, both at verifying the correctness of combina- tors and in finding the source of errors. However, it does have some drawbacks: 1. It generates many proof goals for blocks. 2. Many proofs that should be completed automatically require some manual intervention to tweak the role of the automated tactics. 3. We have not formally established the link between the proof obligations we generate for each block and the original definitions of correctness. The first issue stems from the increased role of the size inference system over what was originally expected. When this work was begun it was presumed that size inference would be inefficient and it would almost always be preferable to manually specify block sizes. However, we have found that the opposite is often the case. Except for primitive blocks, where sizes must always be specified manually, size inference is usually easier than writing complex size expressions by hand. In addition, while hand-coded size expressions are more efficient than inferred ones, the differences between the two tend to follow common patterns (some of which we have proved as theorems during the course of this work). It seems likely that in most cases the manually specified size functions could be produced by applying correctness-preserving transformations to the inferred size expressions automatically in the compiler. Using the size inference system, it should no longer be necessary to prove validity and con- tainment for each block’s size expressions if these properties could be proved for the inference algorithm itself. We can satisfy ourselves by inspection that sizes inferred by the inference system have correct containment properties since the inference algorithm is designed to select the topmost, rightmost possible co-ordinate of a layout 3 . We can also prove a theorem about the size inference function to show validity of its results: Theorem 22 For all blocks A, where R is the set of higher-order parameters of A and for 3 “Correct by definition” is not totally satisfactory, however it is sufficient for our purposes.

CHAPTER 4. VERIFYING CIRCUIT LAYOUTS 103<br />

4.8 Discussion<br />

Our approach to layout verification is effective, both at verifying the correctness <strong>of</strong> combina-<br />

tors and in finding the source <strong>of</strong> errors. However, it does have some drawbacks:<br />

1. It generates many pro<strong>of</strong> goals for blocks.<br />

2. Many pro<strong>of</strong>s that should be completed automatically require some manual intervention<br />

to tweak the role <strong>of</strong> the automated tactics.<br />

3. We have not formally established the link between the pro<strong>of</strong> obligations we generate<br />

for each block and the original definitions <strong>of</strong> correctness.<br />

The first issue stems from the increased role <strong>of</strong> the size inference system over what was<br />

originally expected. When this work was begun it was presumed that size inference would be<br />

inefficient and it would almost always be preferable to manually specify block sizes. However,<br />

we have found that the opposite is <strong>of</strong>ten the case. Except for primitive blocks, where sizes<br />

must always be specified manually, size inference is usually easier than writing complex size<br />

expressions by hand. In addition, while hand-coded size expressions are more efficient than<br />

inferred ones, the differences between the two tend to follow common patterns (some <strong>of</strong> which<br />

we have proved as theorems during the course <strong>of</strong> this work).<br />

It seems likely that in most cases the manually specified size functions could be produced by<br />

applying correctness-preserving transformations to the inferred size expressions automatically<br />

in the compiler.<br />

Using the size inference system, it should no longer be necessary to prove validity and con-<br />

tainment for each block’s size expressions if these properties could be proved for the inference<br />

algorithm itself. We can satisfy ourselves by inspection that sizes inferred by the inference<br />

system have correct containment properties since the inference algorithm is designed to select<br />

the topmost, rightmost possible co-ordinate <strong>of</strong> a layout 3 . We can also prove a theorem about<br />

the size inference function to show validity <strong>of</strong> its results:<br />

Theorem 22 For all blocks A, where R is the set <strong>of</strong> higher-order parameters <strong>of</strong> A and for<br />

3 “Correct by definition” is not totally satisfactory, however it is sufficient for our purposes.

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