Verification of Parameterised FPGA Circuit Descriptions with Layout ...

CHAPTER 4. VERIFYING CIRCUIT LAYOUTS 98
B
A
C
Figure 4.16: An irregular grid such as this one is impossible to describe using purely beside
and below relative placement.
proof obligation and can be accomplished by using HOL theorems such as:
theorem the equality: "P a;Îx. P x =⇒ x = a =⇒ (THE x. P x) = a"
theorem theI2: "P a;Îx. P x =⇒ x = a;Îx. P x =⇒ Q x =⇒ Q (THE x. P x)"
Theorem theI2 is the most useful, since it allows a definite description to be extracted from
within a let-definition. However, selecting the correct value is then a proof obligation in
three parts: proving that a value bound by the predicate exists, proving that it is unique
and proving that it satisfies the original proposition. This is a complex and fiddly process
which in general is not worth bothering with. It is, however, an illuminating and unexpected
observation that directional abstraction, which generally aids reasoning about functional
properties, complicates reasoning about layout when internal signals are involved.
Full definitions and theories for some of the recursive index operators can be found in Ap-
pendix C.2.
4.7.2 An Irregular Grid
In Chapter 1 we introduced one example of a pathological layout arrangement that was
impossible to describe using purely beside and below relative placement constructs. This
irregular grid arrangement is shown in Figure 4.16.
Quartz can describe a combinator with this layout, as shown in Figure 4.17. Layout proofs
were attempted for two versions of this combinator: one with an inferred size function and
one where the size function was specified manually. There was a marked difference in the
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