Verification of Parameterised FPGA Circuit Descriptions with Layout ...

CHAPTER 4. VERIFYING CIRCUIT LAYOUTS 93
R (3)
R (2)
R (1)
R (0)
(a)
imap 4 R
R (0) R (1) R (2) R (3)
(b) irow 4 R
Figure 4.13: Index operators
R (3,0) R (3,1) R (3,2)
R (2,0) R (2,1) R (2,2)
R (1,0) R (1,1) R (1,2)
R (0,0) R (1,0) R (2,0)
(c) igrid 3,4 R
The full definitions and proofs for some of the prelude library blocks are given in Appen-
dix C.1. This appendix omits all wiring blocks, where proofs are usually trivial and many
blocks where the block structures are very similar and thus the proofs identical to others
(such as col, which is very similar to row ).
4.7 Proving Other Combinators
While the prelude library consists of some extremely useful constructs, most of the blocks
in it are quite simple. In Chapter 6 we will investigate the effectiveness of our verification
framework when applied to full circuit descriptions, however we are also interested in the
ease with which we can prove other useful libraries of combinators.
4.7.1 Index Operators
The index operators are versions of some of the standard Quartz prelude blocks which pa-
rameterise their blocks with an integer parameter. For example, the index-map combinator
imap n R is similar to map n R except the it instantiates instances of R parameterised with
0, 1, . . .,n − 1 as shown in Figure 4.13(a). Operations such as irow n R (Figure 4.13(b)) and
igrid n R (Figure 4.13(c)) correspond to rown R and grid n R respectively.
The index operators are particularly important examples for our system because the extra
parameterisation of the R block could lead to the size of each instance of R being different.