MPLAB C Compiler for PIC24 MCUs and dsPIC DSCs ... - Microchip
MPLAB C Compiler for PIC24 MCUs and dsPIC DSCs ... - Microchip
MPLAB C Compiler for PIC24 MCUs and dsPIC DSCs ... - Microchip
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16-Bit C <strong>Compiler</strong> User’s Guide<br />
TABLE 3-9: SPECIFIC OPTIMIZATION OPTIONS (CONTINUED)<br />
Option Definition<br />
-fthread-jumps Per<strong>for</strong>m optimizations where a check is made to see if a jump<br />
branches to a location where another comparison subsumed<br />
by the first is found. If so, the first branch is redirected to either<br />
the destination of the second branch or a point immediately<br />
following it, depending on whether the condition is known to<br />
be true or false.<br />
-funroll-loops Per<strong>for</strong>m the optimization of loop unrolling. This is only done<br />
<strong>for</strong> loops whose number of iterations can be determined at<br />
compile time or run time. -funroll-loops implies both<br />
-fstrength-reduce <strong>and</strong> -frerun-cse-after-loop.<br />
-funroll-all-loops Per<strong>for</strong>m the optimization of loop unrolling. This is done <strong>for</strong> all<br />
loops <strong>and</strong> usually makes programs run more slowly.<br />
-funroll-all-loops implies -fstrength-reduce, as<br />
well as -frerun-cse-after-loop.<br />
Options of the <strong>for</strong>m -fflag specify machine-independent flags. Most flags have both<br />
positive <strong>and</strong> negative <strong>for</strong>ms; the negative <strong>for</strong>m of -ffoo would be -fno-foo. In the<br />
table below, only one of the <strong>for</strong>ms is listed (the one that is not the default.)<br />
TABLE 3-10: MACHINE-INDEPENDENT OPTIMIZATION OPTIONS<br />
Option Definition<br />
-f<strong>for</strong>ce-mem Force memory oper<strong>and</strong>s to be copied into registers<br />
be<strong>for</strong>e doing arithmetic on them. This produces better<br />
code by making all memory references potential common<br />
subexpressions. When they are not common subexpressions,<br />
instruction combination should eliminate the<br />
separate register-load. The -O2 option turns on this<br />
option.<br />
-finline-functions Integrate all simple functions into their callers. The<br />
compiler heuristically decides which functions are simple<br />
enough to be worth integrating in this way. If all calls to a<br />
given function are integrated, <strong>and</strong> the function is declared<br />
static, then the function is normally not output as<br />
assembler code in its own right.<br />
-finline-limit=n By default, the compiler limits the size of functions that<br />
can be inlined. This flag allows the control of this limit <strong>for</strong><br />
functions that are explicitly marked as inline (i.e., marked<br />
with the inline keyword). n is the size of functions that<br />
can be inlined in number of pseudo instructions (not<br />
counting parameter h<strong>and</strong>ling). The default value of n is<br />
10000. Increasing this value can result in more inlined<br />
code at the cost of compilation time <strong>and</strong> memory<br />
consumption.<br />
Decreasing usually makes the compilation faster <strong>and</strong> less<br />
code will be inlined (which presumably means slower<br />
programs). This option is particularly useful <strong>for</strong> programs<br />
that use inlining.<br />
Note: Pseudo instruction represents, in this particular<br />
context, an abstract measurement of function’s size. In no<br />
way does it represent a count of assembly instructions<br />
<strong>and</strong> as such, its exact meaning might change from one<br />
release of the compiler to an another.<br />
DS51284H-page 50 © 2008 <strong>Microchip</strong> Technology Inc.