Lab 3: Getting Started with DRC, LVS, PEX

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Post-layout Extraction using Calibre PEX: With the layout complete and passing LVS and DRC, it is time to extract the layout parasitic netlist. This will give you a spice netlist of your layout complete with resistance, parasitic capacitance and coupling capacitance. For the extraction process you will use Calibre Interactive - PEX. Before you run PEX, you need to generate the netlist. Got to ICTrace (M) from the IC Palettes, click on [Netlist]. In the pop-up window, input a name for the netlist : MY_INV_netlist, keep all the other setting as default and click OK This will generate netlist for your PEX. Step 1: In IC Stations menu bar, select Calibre -> Run PEX. In the pop-up window, input the Path to Calibre tree $CAL_HOME This will launch Calibre Interactive - PEX.
Step 2: If this is your first time running Calibre Interactive - PEX you will need to create a new runset so just click Cancel. If you have run Calibre before find the previous runset. This will simplify setting up Calibre. Step 3: Begin by clicking the Rules button and setting the rule file and working directory. The rule file should be of the form: $ADK/technology/ic/process/ami05.calibre.rules The Rules button should now be green. Step 4: Next click the Inputs button. The Layout tab should already be set correctly. Under the H-Cells tab, change the PEX x-cell file path to $ADK/technology/adk.hcell. Under "Netlist" tab, change the "Files" to be "MY_INV_netlist" that you generated. Step 5: Now select the Outputs button. At the top, the Extraction Type should be Transistor Level and you can choose one of the following types: RCC - Distributed RC network with coupling capacitors RC - Distributed RC network without coupling capacitors C - Lumped net capacitance with coupling capacitors Select the first one: Distributed RC + coupling caps Step 6: In the Netlist tab you can setup the output format and file name. Choose DSPF as the Format and Use Names From: LAYOUT. You should also see there is a name for File: " MY_INV.pex.netlist ". You may change this file name to be "MY_INV.pex.netlist_DSPF" for you to remember that the output file is a DSPF format. Remember this output file name since you will need this output file for postlayout simulation. Step 7: Next choose Setup -> PEX Options from the menu bar. In the Netlist tab click the Ground node name: check box and enter GND. In the LVS Options tab set Recognize gates: to All. Also enter the following: Power nets: VDD Ground nets: GND Step 8: You should now be all set to perform the extraction so click Run PEX. If a pop up asks to overwrite the layout file click OK to ensure Calibre sees any recent changes to your layout. Step 9: When Calibre has completed the extraction a window will pop up showing the top level of the extracted netlist. Notice that there may be up to two additional netlists which will be included into the top level. The first will contain the RC networks and the second will contain the coupling capacitors. Step 10: Close IC station
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Lab 3: Getting Started with DRC, LVS, PEX

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