Affirma Spectre DC Device Matching Analysis Tutorial - Cadence ...
Affirma Spectre DC Device Matching Analysis Tutorial - Cadence ... Affirma Spectre DC Device Matching Analysis Tutorial - Cadence ...
Affirma Spectre DC Device Matching Analysis Tutorial ∂ The term Vout in (2) is the sensitivity of the output to the drain to source current ∂ΔIdsi and can be efficiently obtained in a standard way as outlined in part b. a- Mismatch models The term σ is the variance of the mismatch current in Mosfet transistors. The mismatch in the current is assumed to be due to a mismatch in the threshold voltage ( ) and the mismatch in the width to length ratio ( ). It is approximated as: 2( ΔIdsi) Vth β where gm o = ∂Ids ----------- , ∂Vth Idso 2 gmo σ2( ΔIds) ( Ids0) 2 ---------------------- ( Ids0) 2 -----------------σ 2 σ ( ΔVth) 2( Δβ) = + ----------------- 2 βo and currently, as implemented in Spectre: σ2( ΔVth) σ2( Δβ) ( β0) 2 ----------------- = = mvtwl 2 ----------------- WL mvtwl22 WL2 -------------------- mvt0 2 + + mbewl 2 ------------------ mbe0 WL 2 + , (EQ 3) Note, that gmo is computed at the DC bias solution from the device model equations, the values a, b, c, d and e are the mismatch parameters while W and L are device parameters. Another way of representing the mismatch current is using the gate voltage variation defined as: Release Date Back Page 16 Close 16
Affirma Spectre DC Device Matching Analysis Tutorial Similarly to the Mosfet, the bipolar σ and the resistor are computed for each device provided that the device size, bias point and mismatch parameters are known. 2( ΔIci) σ2( ΔIri) where gm0 is and Ic0 is the nominal collector current, and ΔVbe =(mvt0) 2 ∂ Ic b-Mismatch analysis (EQ 4) ∂ The goal is to compute Vout for each MOSFET i . The network is characterized ∂ΔIdsi with the standard MNA equations with the addition of the term for the mismatch current: where: -- is the vector of equations, x -- is the vector of unknowns, σ 2 ( ΔVg) σ2( ΔIds) ≡ ---------------------- 2 gmo σ2( ΔIr) mrl ------------------- mr Ir2 0 Lmrlp mrw------------ W mrwp mrlw1mrlw2 = + + ---------------- + ------------------------------ + ------------------------------ ( LW) mrlw1 p ( LW ) mrlw2 p σ2( ΔIc) ( Ic0) 2 ------------------- = f ( gm0) 2 ( Ic0) 2 ˙ ----------------- ( mvt0) 2 ⋅ ∂VBE ∑ i ( x) + m ΔIdsi = 0 i , (EQ 5) Release Date Back Page 17 Close 17
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<strong>Affirma</strong> <strong>Spectre</strong> <strong>DC</strong> <strong>Device</strong> <strong>Matching</strong> <strong>Analysis</strong> <strong>Tutorial</strong><br />
Similarly to the Mosfet, the bipolar σ and the resistor are computed for<br />
each device provided that the device size, bias point and mismatch parameters are<br />
known.<br />
2( ΔIci)<br />
σ2( ΔIri)<br />
where gm0 is and Ic0 is the nominal collector current, and ΔVbe =(mvt0) 2<br />
∂<br />
Ic<br />
b-Mismatch analysis<br />
(EQ 4)<br />
∂<br />
The goal is to compute Vout for each MOSFET i . The network is characterized<br />
∂ΔIdsi<br />
with the standard MNA equations with the addition of the term for the mismatch<br />
current:<br />
where:<br />
-- is the vector of equations,<br />
x<br />
-- is the vector of unknowns,<br />
σ 2 ( ΔVg)<br />
σ2( ΔIds)<br />
≡ ----------------------<br />
2<br />
gmo σ2( ΔIr)<br />
mrl<br />
------------------- mr<br />
Ir2 0 Lmrlp mrw------------<br />
W mrwp<br />
mrlw1mrlw2 = + + ---------------- + ------------------------------ + ------------------------------<br />
( LW)<br />
mrlw1 p ( LW ) mrlw2 p<br />
σ2( ΔIc)<br />
( Ic0) 2<br />
------------------- =<br />
f<br />
( gm0) 2<br />
( Ic0) 2<br />
˙<br />
----------------- ( mvt0)<br />
2 ⋅<br />
∂VBE<br />
∑ i<br />
( x)<br />
+ m ΔIdsi = 0<br />
i<br />
, (EQ 5)<br />
Release Date Back Page 17<br />
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