Accurate PLL Characterization Using Virtuoso Spectre RF Noise ...

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22 • • • • Experimental Results using Cadence RFkit database The test circuit used was a N-Integer 2.4 GHz PLL including a PFD, charge pump, VCO and divider available in Cadence RFKit ([8], [9]). Using Cadence SpectreRF PLL flow (versions IC5141/MMSIM611), the phase noise was extracted for the PFD and VCO blocks to generate a phase-domain model for the entire PLL. The closed-loop PLL behavior is then simulated using Spectre TRAN analysis and compared with transistor level simulation. – September 17, 2007 Results generated on an IBM MPRO Linux 64 bits OS. Additional metrics (Injection Pulling, power supply rejection) are directly evaluated
23 September 17, 2007 PPV versus transistor-level Settling time Simulation results Spectre Transistor level simulation PPV Sampling*=1 46 hours Experimental data extracted from PLL test circuit available in Cadence RF kit ([8] and [9]) Spectre PPV CMI/VerilogA simulation Simulation Ratio 10.8 s 15285 (165.08Ks) PPV Sampling*=50 8 min 35s (515s) 320 *Sampling refers to the number of sample points per period. To calculate the phase accurately, the transient time step is bounded as ((1/(vco frequency)) / sample points per period
Page 1 and 2: INVENTIVE Using Spectre RF Noise-Aw
Page 3 and 4: 3 • • • Introduction Phase lo
Page 5 and 6: 5 Challenges of PLL Simulation •
Page 7 and 8: 7 V R Spectre RF Noise-Aware PLL Si
Page 9 and 10: 9 PLL Model Extraction Flow • •
Page 11 and 12: 11 September 17, 2007 PLL testbench
Page 13 and 14: 13 Non-Linear VCO Modeling • •
Page 15 and 16: 15 Effect of Noise and Perturbation
Page 17 and 18: 17 SpectreRF’s PPV-based VCO Mode
Page 19 and 20: 19 • • • Strengths of Spectre
Page 21: 21 Using Spectre RF Noise-Aware PLL
Page 25 and 26: 25 PLL Noise-Aware Flow Experimenta
Page 27 and 28: 27 Conclusions • • • • Cade
Page 29 and 30: 29 References • • • • • [

Accurate PLL Characterization Using Virtuoso Spectre RF Noise ...

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