Accurate PLL Characterization Using Virtuoso Spectre RF Noise ...

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10 PLL Simulation Flow • • • September 17, 2007 Create new PLL Testbench by placing the extracted models in a PLL testbench Start ADE and setup test simulation Run Transient Analysis – Designers have an option to simulate either with or without noise – Simulate without noise for PLL large signal characteristics such as lock Time – Simulate with noise for phase noise and jitter Create PLL Testbench Start ADE and Setup Test Simulate Transient Analyze Results
11 September 17, 2007 PLL testbench using the PPV model Cell: pll_bench (custom veriloga) (PPV model) (schematic) (power supply noise injection) (utility for freq output and saving periods.txt for phase noise/jitter calculation) (LC tank noise injection)
Page 1 and 2: INVENTIVE Using Spectre RF Noise-Aw
Page 3 and 4: 3 • • • Introduction Phase lo
Page 5 and 6: 5 Challenges of PLL Simulation •
Page 7 and 8: 7 V R Spectre RF Noise-Aware PLL Si
Page 9: 9 PLL Model Extraction Flow • •
Page 13 and 14: 13 Non-Linear VCO Modeling • •
Page 15 and 16: 15 Effect of Noise and Perturbation
Page 17 and 18: 17 SpectreRF’s PPV-based VCO Mode
Page 19 and 20: 19 • • • Strengths of Spectre
Page 21 and 22: 21 Using Spectre RF Noise-Aware PLL
Page 23 and 24: 23 September 17, 2007 PPV versus tr
Page 25 and 26: 25 PLL Noise-Aware Flow Experimenta
Page 27 and 28: 27 Conclusions • • • • Cade
Page 29 and 30: 29 References • • • • • [

Accurate PLL Characterization Using Virtuoso Spectre RF Noise ...

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