Enabler II-G Assiste GPS Integration Guide - Farnell
Enabler II-G Assiste GPS Integration Guide - Farnell
Enabler II-G Assiste GPS Integration Guide - Farnell
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Enfora <strong>Enabler</strong> <strong>II</strong>I-G<br />
Modem <strong>Integration</strong> <strong>Guide</strong><br />
Typical use controlling PWR_CTL from microcontroller:<br />
Typical connection of PWR_CTL to modem:<br />
Float<br />
VBAT<br />
PWR_CTL<br />
RESET<br />
Modem<br />
Figure 16 - External Power Control Signal (no external processor) shows a typical connection to the Enfora<br />
<strong>Enabler</strong> <strong>II</strong>I-G module in a machine-to-machine application using the external PWR_CTL signal, when there is<br />
not an external processor controlling the power on/off states. The RTC deep sleep functions will NOT function<br />
since the PWR_CTL pin is tied low, the processor will never stay in a “RTC Sleep” mode. To reset the module,<br />
either the RESET pin is toggled as described in the ‘Reset Signal’ section, or power (VBAT) must be cycled.<br />
Float<br />
VBAT<br />
PWR_CTL<br />
RESET<br />
Modem<br />
Figure 16 - External Power Control Signal (no external processor)<br />
GSM0308PB001 39 Version 1.03– 7/17/2007
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