4 Instruction tables - Agner Fog

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Merom Logic instructions PAND(N) POR PXOR (x)mm,(x)mm 1 1 x x x int 1 0.33 PAND(N) POR PXOR (x)mm,m 1 1 x x x 1 int 1 PSLL/RL/RAW/D/Q mm,mm/i 1 1 1 int 1 1 PSLL/RL/RAW/D/Q mm,m64 1 1 1 1 int 1 PSLL/RL/RAW/D/Q xmm,i 1 1 1 int 1 1 PSLL/RL/RAW/D/Q xmm,xmm 2 2 x x int 2 1 PSLL/RL/RAW/D/Q xmm,m128 3 2 x x 1 int 1 PSLL/RLDQ xmm,i 2 2 x x int 2 1 Other EMMS Notes: 11 11 x x x float 6 g) SSE3 instruction set. h) Supplementary SSE3 instruction set. MASM uses the name MOVD rather than MOVQ for this instruction even when k) moving 64 bits. Floating point XMM instructions <strong>Instruction</strong> Operands μops μops unfused domain Unit LatenReci- fused cyprocal Move instructions domain p015 p0 p1 p5 p2 p3 p4 throughput MOVAPS/D xmm,xmm 1 1 x x x int 1 0.33 MOVAPS/D xmm,m128 1 1 int 2 1 MOVAPS/D m128,xmm 1 1 1 3 1 MOVUPS/D xmm,m128 4 2 1 1 2 int 2-4 2 MOVUPS/D m128,xmm 9 4 x x x 1 2 2 3-4 4 MOVSS/D xmm,xmm 1 1 x x x int 1 0.33 MOVSS/D xmm,m32/64 1 1 int 2 1 MOVSS/D m32/64,xmm 1 1 1 3 1 MOVHPS/D MOVLPS/D xmm,m64 2 1 1 1 int 3 1 MOVHPS/D m64,xmm 2 1 1 1 1 5 1 MOVLPS/D m64,xmm 1 1 1 3 1 MOVLHPS MOVHLPS xmm,xmm 1 1 1 float 1 1 MOVMSKPS/D r32,xmm 1 1 1 float 1 1 MOVNTPS/D m128,xmm 1 1 1 2-3 SHUFPS xmm,xmm,i 3 3 3 flt→int 3 2 SHUFPS xmm,m128,i 4 3 3 1 flt→int 2 SHUFPD xmm,xmm,i 1 1 1 float 1 1 SHUFPD xmm,m128,i 2 1 1 1 float 1 MOVDDUP g) xmm,xmm 1 1 1 int 1 1 MOVDDUP g) xmm,m64 2 1 1 1 int 1 MOVSH/LDUP g) xmm,xmm 1 1 1 int 1 1 MOVSH/LDUP g) xmm,m128 2 1 1 1 int 1 UNPCKH/LPS xmm,xmm 3 3 3 flt→int 3 2 UNPCKH/LPS xmm,m128 4 3 3 1 int 2 UNPCKH/LPD xmm,xmm 1 1 1 float 1 1 Page 90
Merom UNPCKH/LPD xmm,m128 2 1 1 1 float 1 Conversion CVTPD2PS xmm,xmm 2 2 float 4 1 CVTPD2PS xmm,m128 2 2 1 float 1 CVTSD2SS xmm,xmm 2 2 float 4 1 CVTSD2SS xmm,m64 2 2 1 float 1 CVTPS2PD xmm,xmm 2 2 2 float 2 2 CVTPS2PD xmm,m64 2 2 2 1 float 2 CVTSS2SD xmm,xmm 2 2 float 2 2 CVTSS2SD xmm,m32 2 2 2 1 float 2 CVTDQ2PS xmm,xmm 1 1 1 float 3 1 CVTDQ2PS xmm,m128 1 1 1 1 float 1 CVT(T) PS2DQ xmm,xmm 1 1 1 float 3 1 CVT(T) PS2DQ xmm,m128 1 1 1 1 float 1 CVTDQ2PD xmm,xmm 2 2 1 1 float 4 1 CVTDQ2PD xmm,m64 3 2 1 float 1 CVT(T)PD2DQ xmm,xmm 2 2 float 4 1 CVT(T)PD2DQ xmm,m128 2 2 1 float 1 CVTPI2PS xmm,mm 1 1 1 float 3 3 CVTPI2PS xmm,m64 1 1 1 1 float 3 CVT(T)PS2PI mm,xmm 1 1 1 float 3 1 CVT(T)PS2PI mm,m128 1 1 1 1 float 1 CVTPI2PD xmm,mm 2 2 1 1 float 4 1 CVTPI2PD xmm,m64 2 2 1 1 1 float 1 CVT(T) PD2PI mm,xmm 2 2 1 1 float 4 1 CVT(T) PD2PI mm,m128 2 2 1 1 1 float 1 CVTSI2SS xmm,r32 1 1 1 float 4 3 CVTSI2SS xmm,m32 1 1 1 1 float 3 CVT(T)SS2SI r32,xmm 1 1 1 float 3 1 CVT(T)SS2SI r32,m32 1 1 1 1 float 1 CVTSI2SD xmm,r32 2 2 1 1 float 4 3 CVTSI2SD xmm,m32 2 1 1 1 float 3 CVT(T)SD2SI r32,xmm 1 1 1 float 3 1 CVT(T)SD2SI r32,m64 1 1 1 1 float 1 Arithmetic ADDSS/D SUBSS/D xmm,xmm 1 1 1 float 3 1 ADDSS/D SUBSS/D xmm,m32/64 1 1 1 1 float 1 ADDPS/D SUBPS/D xmm,xmm 1 1 1 float 3 1 ADDPS/D SUBPS/D xmm,m128 1 1 1 1 float 1 ADDSUBPS/D g) xmm,xmm 1 1 1 float 3 1 ADDSUBPS/D g) xmm,m128 1 1 1 1 float 1 HADDPS HSUBPS g) xmm,xmm 6 6 float 9 3 HADDPS HSUBPS g) xmm,m128 7 6 1 float 3 HADDPD HSUBPD g) xmm,xmm 3 3 float 5 2 HADDPD HSUBPD g) xmm,m128 4 3 1 float 2 MULSS xmm,xmm 1 1 1 float 4 1 MULSS xmm,m32 1 1 1 1 float 1 MULSD xmm,xmm 1 1 1 float 5 1 Page 91
Page 1 and 2:
Introduction 4 Instruction tables L
Page 3 and 4:
Definition of terms Operands Latenc
Page 5 and 6:
Definition of terms It is not possi
Page 7 and 8:
AMD K7 AMD K7 List of instruction t
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AMD K7 IMUL r32,r32/m32 2 4 2.5 ALU
Page 11 and 12:
AMD K7 Other NOP (90) 1 0 1/3 ALU L
Page 13 and 14:
AMD K7 PUNPCKH/LBW/WD mm,r/m 1 2 2
Page 15 and 16:
AMD K7 Integer instructions PAVGUSB
Page 17 and 18:
MOVNTI m,r 1 2-3 AGU MOVZX, MOVSX r
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RCL, RCR m,1 1 7 4 ALU, AGU RCL m,i
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K8 FNSTSW m16 2 8 FMISC, ALU do. FN
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PADDB/W/D/Q PADDSB/W PADDUSB/W PSUB
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MAXSS/D MINSS/D r,r/m 1 2 1 FADD MA
Page 27 and 28:
K10 MOVNTI m,r 1 1 AGU MOVZX, MOVSX
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K10 RCR m,CL 8 7 5 ALU, AGU SHLD, S
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K10 FADD(P),FSUB(R)(P) r/m 1 4 1 FA
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K10 PADDB/W/D/Q PADDSB/W PADDUSB/W
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K10 LDMXCSR m 12 12 10 STMXCSR m 3
Page 37 and 38:
Bulldozer Integer instructions Inst
Page 39 and 40: Bulldozer TEST m,r 1 0.5 EX01 TEST
Page 41 and 42: Bulldozer FLD m80 8 14 4 fp FBLD m8
Page 43 and 44: Bulldozer MASKMOVQ mm,mm 31 38 37 P
Page 45 and 46: Bulldozer MOVDDUP x,x 1 2 1 P1 ivec
Page 47 and 48: Logic AND/ANDN/OR/XORPS/ PD VAND/AN
Page 49 and 50: Bobcat AMD Bobcat List of instructi
Page 51 and 52: Bobcat IMUL r16,(r16),i 2 4 3 I0 IM
Page 53 and 54: Bobcat Move instructions FLD r 1 2
Page 55 and 56: Bobcat PUNPCKH/LBW/WD/ DQ PUNPCKH/L
Page 57 and 58: Bobcat MOVSHDUP, MOVSLDUP r,m 2 12
Page 59 and 60: Intel Pentium Intel Pentium and Pen
Page 61 and 62: Intel Pentium REP MOVS 12+n g) np S
Page 63 and 64: s Intel Pentium May be up to 3 cloc
Page 65 and 66: Pentium II and III PUSHF(D) 3 11 1
Page 67 and 68: Pentium II and III a) Faster under
Page 69 and 70: Pentium II and III PMOVMSKB d) r32,
Page 71 and 72: Pentium M Intel Pentium M, Core Sol
Page 73 and 74: Pentium M DIV IDIV r16 4 3 1 15-24
Page 75 and 76: Pentium M FLD r 1 1 1 FLD m32/64 1
Page 77 and 78: Pentium M MOVNTDQ PACKSSWB/DW m128,
Page 79 and 80: Pentium M MOVUPS/D m128,xmm 8 4 2 2
Page 81 and 82: Pentium M RSQRTSS xmm,xmm 1 1 3 1 R
Page 83 and 84: Merom Move instructions MOV r,r/i 1
Page 85 and 86: Merom ROR ROL m,i/cl 3 2 x x 1 1 1
Page 87 and 88: Merom FLDPI FLDL2E etc. 2 2 2 float
Page 89: Merom PALIGNR h) xmm,m128,i 2 2 x x
Page 93 and 94: Wolfdale Intel Core 2 (Wolfdale, 45
Page 95 and 96: Wolfdale ADC SBB r,m 2 2 x x x 1 2
Page 97 and 98: Wolfdale LODS 3 2 1 1 REP LODS 4+7n
Page 99 and 100: Wolfdale Other FNOP 1 1 1 float 1 W
Page 101 and 102: Wolfdale Arithmetic instructions PA
Page 103 and 104: Wolfdale SHUFPS xmm,m128,i 2 1 1 1
Page 105 and 106: Wolfdale DPPD j) xmm,m128,i 4 4 x x
Page 107 and 108: Latency: Reciprocal throughput: Neh
Page 109 and 110: Nehalem CBW CWDE CDQE 1 1 x x x int
Page 111 and 112: Nehalem Floating point x87 instruct
Page 113 and 114: Nehalem MOVNTDQA j) PACKSSWB/DW PAC
Page 115 and 116: Nehalem PHMINPOSUW j) PABSB PABSW P
Page 117 and 118: Nehalem CVTDQ2PS xmm,xmm 1 1 1 floa
Page 119 and 120: Sandy Bridge Intel Sandy Bridge Lis
Page 121 and 122: Sandy Bridge INC DEC NEG NOT r 1 1
Page 123 and 124: Sandy Bridge CALL m 3 2 1 2 1 2 RET
Page 125 and 126: Sandy Bridge FYL2XP1 464 464 726 FP
Page 127 and 128: Sandy Bridge PCMPEQ/GTB/W/D (x)mm,m
Page 129 and 130: Sandy Bridge MOVMSKPS/D r32,x 1 1 1
Page 131 and 132: Sandy Bridge ADDSS/D SUBSS/D x,x 1
Page 133 and 134: Pentium 4 Intel Pentium 4 List of i
Page 135 and 136: Pentium 4 SFENCE 4 2 40 sse LFENCE
Page 137 and 138: Pentium 4 RETF i 4 33 11 0 86 IRET
Page 139 and 140: Pentium 4 Math FSQRT 1 0 43 0 43 1
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Pentium 4 PMIN/MAXSW r,r/m 1 0 2 1
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Pentium 4 h) Throughput of FP-MUL u
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Prescott MOV r64,i64 2 0 0 1 1 alu1
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Prescott IDIV r8/m8 1 21 76 0 34 1
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Prescott RDPMC (bit 31 = 1) 1 37 10
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Prescott Other FNOP 1 0 1 0 1 0 mov
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Prescott Other EMMS Notes: 10 10 12
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Atom Intel Atom List of instruction
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Atom IMUL r16,r16 2 ALU0, Mul 6 5 I
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Atom NOP (90) 1 ALU0/1 1/2 Long NOP
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Atom PACKSSWB/DW PACKUSWB (x)mm, (x
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Atom HADDPS HSUBPS xmm,xmm 5 FP0+1
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VIA Nano 2000 MOVSX MOVSXD MOVZX r,
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VIA Nano 2000 SETcc m 1 CLC STC CMC
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VIA Nano 2000 FABS 1 MB 1 1 FCHS 1
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VIA Nano 2000 Floating point XMM in
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VIA Nano 2000 REP XCRYPTECB 192 bit
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Nano 3000 MOVSX MOVZX r,r 1 I12 1 1
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Nano 3000 Control transfer instruct
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Nano 3000 FCOMPP FUCOMPP 1 MB 1 FCO
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PABSB PABSW PABSD PSIGNB PSIGNW PSI
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Nano 3000 Other LDMXCSR m32 31 STMX
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4 Instruction tables - Agner Fog

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