4 Instruction tables - Agner Fog

Merom
d) Round divisors or low precision give low values.
f) Resolved by register renaming. Generates no μops in the unfused domain.
g) SSE3 instruction set.
Integer MMX and XMM instructions
Instruction Operands μops μops unfused domain Unit LatenReci- fused
cyprocal Move instructions
domain
p015 p0 p1 p5 p2 p3 p4
throughput
MOVD k) r32/64,(x)mm 1 1 x x x int 2 0.33
MOVD k) m32/64,(x)mm 1 1 1 3 1
MOVD k) (x)mm,r32/64 1 1 x x int 2 0.5
MOVD k) (x)mm,m32/64 1 1 int 2 1
MOVQ (x)mm, (x)mm 1 1 x x x int 1 0.33
MOVQ (x)mm,m64 1 1 int 2 1
MOVQ m64, (x)mm 1 1 1 3 1
MOVDQA xmm, xmm 1 1 x x x int 1 0.33
MOVDQA xmm, m128 1 1 int 2 1
MOVDQA m128, xmm 1 1 1 3 1
MOVDQU m128, xmm 9 4 x x x 1 2 2 3-8 4
MOVDQU xmm, m128 4 2 x x 2 int 2-8 2
LDDQU g) xmm, m128 4 2 x x 2 int 2-8 2
MOVDQ2Q mm, xmm 1 1 x x x int 1 0.33
MOVQ2DQ xmm,mm 1 1 x x x int 1 0.33
MOVNTQ m64,mm 1 1 1 2
MOVNTDQ m128,xmm 1 1 1 2
PACKSSWB/DW PACK- mm,mm 1 1 1 int 1 1
USWB
mm,m64 1 1 1 1 int 1
PACKSSWB/DW PACK- xmm,xmm 3 3 flt→int 3 2
USWB
xmm,m128 4 3 1 int 2
PUNPCKH/LBW/WD/DQ mm,mm 1 1 1 int 1 1
PUNPCKH/LBW/WD/DQ mm,m64 1 1 1 1 int 1
PUNPCKH/LBW/WD/DQ xmm,xmm 3 3 flt→int 3 2
PUNPCKH/LBW/WD/DQ xmm,m128 4 3 1 int 2
PUNPCKH/LQDQ xmm,xmm 1 1 int 1 1
PUNPCKH/LQDQ xmm, m128 2 1 1 int 1
PSHUFB h) mm,mm 1 1 1 int 1 1
PSHUFB h) mm,m64 2 1 1 1 int 1
PSHUFB h) xmm,xmm 4 4 int 3 2
PSHUFB h) xmm,m128 5 4 1 int 2
PSHUFW mm,mm,i 1 1 1 int 1 1
PSHUFW mm,m64,i 2 1 1 1 int 1
PSHUFD xmm,xmm,i 2 2 x x 1 flt→int 3 1
PSHUFD xmm,m128,i 3 2 x x 1 1 int 1
PSHUFL/HW xmm,xmm,i 1 1 1 int 1 1
PSHUFL/HW xmm, m128,i 2 1 1 1 int 1
PALIGNR h) mm,mm,i 2 2 x x x int 2 1
PALIGNR h) mm,m64,i 2 2 x x x 1 int 1
PALIGNR h) xmm,xmm,i 2 2 x x x int 2 1
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