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4 Instruction tables - Agner Fog

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Pentium II and III<br />

a)<br />

Faster under certain conditions: see manual 3: "The microarchitecture of Intel,<br />

AMD and VIA CPUs".<br />

b) Has an implicit LOCK prefix.<br />

c) 3 if constant without base or index register<br />

d) P3 only.<br />

Floating point x87 instructions (Pentium Pro, II and III)<br />

<strong>Instruction</strong> Operands μops Latency Reciprocal<br />

p0 p1 p01 p2 p3 p4<br />

throughput<br />

FLD r 1<br />

FLD m32/64 1 1<br />

FLD m80 2 2<br />

FBLD m80 38 2<br />

FST(P) r 1<br />

FST(P) m32/m64 1 1 1<br />

FSTP m80 2 2 2<br />

FBSTP m80 165 2 2<br />

FXCH r 0 ⅓ f)<br />

FILD m 3 1 5<br />

FIST(P) m 2 1 1 5<br />

FLDZ 1<br />

FLD1 FLDPI FLDL2E etc. 2<br />

FCMOVcc r 2 2<br />

FNSTSW AX 3 7<br />

FNSTSW m16 1 1 1<br />

FLDCW m16 1 1 1 10<br />

FNSTCW m16 1 1 1<br />

FADD(P) FSUB(R)(P) r 1 3 1<br />

FADD(P) FSUB(R)(P) m 1 1 3-4 1<br />

FMUL(P) r 1 5 2 g)<br />

FMUL(P) m 1 1 5-6 2 g)<br />

FDIV(R)(P) r 1 38 h) 37<br />

FDIV(R)(P) m 1 1 38 h) 37<br />

FABS 1<br />

FCHS 3 2<br />

FCOM(P) FUCOM r 1 1<br />

FCOM(P) FUCOM m 1 1 1<br />

FCOMPP FUCOMPP 1 1 1<br />

FCOMI(P) FUCOMI(P) r 1 1<br />

FCOMI(P) FUCOMI(P) m 1 1 1<br />

FIADD FISUB(R) m 6 1<br />

FIMUL m 6 1<br />

FIDIV(R) m 6 1<br />

FICOM(P) m 6 1<br />

FTST 1 1<br />

FXAM 1 2<br />

FPREM 23<br />

FPREM1 33<br />

FRNDINT 30<br />

Page 67

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