4 Instruction tables - Agner Fog

Prescott
Other
EMMS
Notes:
10 10 12 0 mmx
a) Add 1 μop if source is a memory operand.
j) Reciprocal throughput is 1 for 64 bit operands, and 2 for 128 bit operands.
k)
It may be advantageous to replace this instruction by two 64-bit moves or LD-
DQU.
Floating point XMM instructions
Instruction Operands
μops
Microcode
Latency
Page 153
Additional latency
Reciprocal throughput
Move instructions
MOVAPS/D r,r 1 0 7 0 1 0 mov sse
MOVAPS/D r,m 1 0 0 1 2 sse
MOVAPS/D m,r 2 0 2 0 sse
MOVUPS/D r,r 1 0 7 0 1 0 mov sse
MOVUPS/D r,m 4 0 2 2 sse k
MOVUPS/D m,r 4 2 8 0 sse k
MOVSS r,r 1 0 2 1 2 1 mmx shift sse
MOVSD r,r 1 0 4 1 2 1 mmx shift sse
MOVSS, MOVSD r,m 1 0 0 1 2 sse
MOVSS, MOVSD m,r 2 0 2 0 sse
MOVHLPS r,r 1 0 4 1 2 1 mmx shift sse
MOVLHPS r,r 1 0 2 1 2 1 mmx shift sse
MOVHPS/D, MOVLPS/D r,m 2 0 2 2 sse
MOVHPS/D, MOVLPS/D m,r 2 0 2 0 sse
MOVSH/LDUP r,r 1 0 4 1 2 1 sse3
MOVDDUP r,r 1 0 2 1 2 1 sse3
MOVNTPS/D m,r 2 0 4 0 sse
MOVMSKPS/D r32,r 2 0 5 1 3 1 fp sse
SHUFPS/D r,r/m,i 1 0 4 1 2 1 mmx shift sse
UNPCKHPS/D r,r/m 2 0 4 1 2 1 mmx shift sse
UNPCKLPS/D r,r/m 1 0 2 1 2 1 mmx shift sse
Conversion
CVTPS2PD r,r/m 1 0 4 1 4 1 mmx shift sse2 a
CVTPD2PS r,r/m 2 0 10 1 2 1 fp-mmx sse2 a
CVTSD2SS r,r/m 3 0 14 1 6 1 mmx shift sse2 a
CVTSS2SD r,r/m 2 0 8 1 6 1 mmx shift sse2 a
CVTDQ2PS r,r/m 1 0 5 1 2 1 fp sse2 a
CVTDQ2PD r,r/m 3 0 10 1 4 1 mmx-fp sse2 a
CVT(T)PS2DQ r,r/m 1 0 5 1 2 1 fp sse2 a
CVT(T)PD2DQ r,r/m 2 0 11 1 2 1 fp-mmx sse2 a
CVTPI2PS xmm,mm 4 0 12 1 6 1 mmx sse a
Port
Execution unit
Subunit
Instruction set
Notes