4 Instruction tables - Agner Fog
4 Instruction tables - Agner Fog
4 Instruction tables - Agner Fog
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Pentium 4<br />
PMIN/MAXSW r,r/m 1 0 2 1 1,2 1 mmx alu sse a,j<br />
PSADBW r,r/m 1 0 4 1 1,2 1 mmx alu sse a,j<br />
Logic<br />
PAND, PANDN r,r/m 1 0 2 1 1,2 1 mmx alu mmx a,j<br />
POR, PXOR<br />
PSLL/RLW/D/Q,<br />
r,r/m 1 0 2 1 1,2 1 mmx alu mmx a,j<br />
PSRAW/D<br />
r,i/r/m 1 0 2 1 1,2 1 mmx shift mmx a,j<br />
PSLLDQ, PSRLDQ xmm,i 1 0 4 1 2 1 mmx shift sse2 a<br />
Other<br />
EMMS 4 11 12 12 0 mmx<br />
Notes:<br />
a) Add 1 μop if source is a memory operand.<br />
j) Reciprocal throughput is 1 for 64 bit operands, and 2 for 128 bit operands.<br />
k) It may be advantageous to replace this instruction by two 64-bit moves<br />
Floating point XMM instructions<br />
<strong>Instruction</strong> Operands<br />
μops<br />
Microcode<br />
Latency<br />
Page 141<br />
Additional latency<br />
Reciprocal throughput<br />
Move instructions<br />
MOVAPS/D r,r 1 0 6 0 1 0 mov sse<br />
MOVAPS/D r,m 1 0 ≈ 7 0 1 2 sse<br />
MOVAPS/D m,r 2 0 ≈ 7 2 0 sse<br />
MOVUPS/D r,r 1 0 6 0 1 0 mov sse<br />
MOVUPS/D r,m 4 0 2 2 sse k<br />
MOVUPS/D m,r 4 6 8 0 sse k<br />
MOVSS r,r 1 0 2 0 2 1 mmx shift sse<br />
MOVSD r,r 1 0 2 1 2 1 mmx shift sse<br />
MOVSS, MOVSD r,m 1 0 ≈ 7 0 1 2 sse<br />
MOVSS, MOVSD m,r 2 0 2 0 sse<br />
MOVHLPS r,r 1 0 4 0 2 1 mmx shift sse<br />
MOVLHPS r,r 1 0 2 0 2 1 mmx shift sse<br />
MOVHPS/D, MOVLPS/D<br />
r,m 3 0 4 2 sse<br />
MOVHPS/D, MOVLPS/D<br />
m,r 2 0 2 0 sse<br />
MOVNTPS/D m,r 2 0 4 0 sse/2<br />
MOVMSKPS/D r32,r 2 0 6 1 3 1 fp sse<br />
SHUFPS/D r,r/m,i 1 0 4 1 2 1 mmx shift sse<br />
UNPCKHPS/D r,r/m 1 0 4 1 2 1 mmx shift sse<br />
UNPCKLPS/D r,r/m 1 0 2 1 2 1 mmx shift sse<br />
Port<br />
Execution unit<br />
Subunit<br />
<strong>Instruction</strong> set<br />
Notes
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