4 Instruction tables - Agner Fog

Pentium 4
Math
FSQRT 1 0 43 0 43 1 fp div 87 g, h
FLDPI, etc. 2 0 3 1 fp 87
FSIN 6 ≈150 ≈180 ≈170 1 fp 387
FCOS 6 ≈175 ≈207 ≈207 1 fp 387
FSINCOS 7 ≈178 ≈216 ≈211 1 fp 387
FPTAN 6 ≈160 ≈230 ≈200 1 fp 87
FPATAN 3 92 ≈187 ≈153 1 fp 87
FSCALE 3 24 57 66 1 fp 87
FXTRACT 3 15 20 20 1 fp 87
F2XM1 3 45 ≈165 63 1 fp 87
FYL2X 3 60 ≈200 90 1 fp 87
FYL2XP1 11 134 ≈242 ≈220 1 fp 87
Other
FNOP 1 0 1 0 1 0 mov 87
(F)WAIT 2 0 0 0 1 0 mov 87
FNCLEX 4 4 96 1 87
FNINIT 6 29 172 87
FNSAVE 4 174 456 420 0,1 87
FRSTOR 4 96 528 532 87
FXSAVE 4 69 132 96 sse i
FXRSTOR
Notes:
4 94 208 208 sse i
e) Not available on PMMX
f)
The latency for FLDCW is 3 when the new value loaded is the same as the
value of the control word before the preceding FLDCW, i.e. when alternating
between the same two values. In all other cases, the latency and reciprocal
throughput is 143.
g)
h) Throughput of FP-MUL unit is reduced during the use of the FP-DIV unit.
i) Takes 6 μops more and 40-80 clocks more when XMM registers are disabled.
Integer MMX and XMM instructions
Instruction Operands
Latency and reciprocal throughput depend on the precision setting in the F.P.
control word. Single precision: 23, double precision: 38, long double precision
(default): 43.
μops
Microcode
Latency
Page 139
Additional latency
Reciprocal throughput
Move instructions
MOVD r32, mm 2 0 5 1 1 0 fp mmx
MOVD mm, r32 2 0 2 0 2 1 mmx alu mmx
MOVD mm,m32 1 0 ≈ 8 0 1 2 load mmx
MOVD r32, xmm 2 0 10 1 2 0 fp sse2
MOVD xmm, r32 2 0 6 1 2 1 mmx shift sse2
Port
Execution unit
Subunit
Instruction set
Notes