4 Instruction tables - Agner Fog

Pentium 4
RETF i 4 33 11 0 86
IRET 4 48 24 0 86
ENTER i,0 4 12 26 26 186
ENTER i,n 4 45+24n 128+16n 186
LEAVE 4 0 3 3 186
BOUND m 4 14 14 14 186
INTO 4 5 18 18 86
INT i 4 84 644 86
String instructions
LODS 4 3 6 6 86
REP LODS 4 5n ≈ 4n+36 86
STOS 4 2 6 6 86
REP STOS 4 2n+3 ≈ 3n+10 86
MOVS 4 4 6 4 86
REP MOVS 4 ≈163+1.1n 86
SCAS 4 3 6 86
REP SCAS 4 ≈ 40+6n ≈4n 86
CMPS 4 5 8 86
REP CMPS 4 ≈ 50+8n ≈4n 86
Other
NOP (90) 1 0 0 0.25 0/1 alu0/1 86
Long NOP (0F 1F) 1 0 0 0.25 0/1 alu0/1 ppro
PAUSE 4 2 sse2
CPUID 4 39-81 200-500 p5
RDTSC
Notes:
4 7 80 p5
a) Add 1 μop if source is a memory operand.
b)
Uses an extra μop (port 3) if SIB byte used. A SIB byte is needed if the
memory operand has more than one pointer register, or a scaled index, or
ESP is used as base pointer.
c)
Add 1 μop if source or destination, but not both, is a high 8-bit register (AH,
BH, CH, DH).
d) Has (false) dependence on the flags in most cases.
e) Not available on PMMX
q) Latency is 12 in 16-bit real or virtual mode, 24 in 32-bit protected mode.
Floating point x87 instructions
Instruction Operands
μops
Microcode
Latency
Page 137
Additional latency
Reciprocal throughput
Move instructions
FLD r 1 0 6 0 1 0 mov 87
FLD m32/64 1 0 ≈ 7 0 1 2 load 87
Port
Execution unit
Subunit
Instruction set
Notes