- Page 1 and 2: Introduction 4 Instruction tables L
- Page 3 and 4: Definition of terms Operands Latenc
- Page 5 and 6: Definition of terms It is not possi
- Page 7 and 8: AMD K7 AMD K7 List of instruction t
- Page 9: AMD K7 IMUL r32,r32/m32 2 4 2.5 ALU
- Page 13 and 14: AMD K7 PUNPCKH/LBW/WD mm,r/m 1 2 2
- Page 15 and 16: AMD K7 Integer instructions PAVGUSB
- Page 17 and 18: MOVNTI m,r 1 2-3 AGU MOVZX, MOVSX r
- Page 19 and 20: RCL, RCR m,1 1 7 4 ALU, AGU RCL m,i
- Page 21 and 22: K8 FNSTSW m16 2 8 FMISC, ALU do. FN
- Page 23 and 24: PADDB/W/D/Q PADDSB/W PADDUSB/W PSUB
- Page 25 and 26: MAXSS/D MINSS/D r,r/m 1 2 1 FADD MA
- Page 27 and 28: K10 MOVNTI m,r 1 1 AGU MOVZX, MOVSX
- Page 29 and 30: K10 RCR m,CL 8 7 5 ALU, AGU SHLD, S
- Page 31 and 32: K10 FADD(P),FSUB(R)(P) r/m 1 4 1 FA
- Page 33 and 34: K10 PADDB/W/D/Q PADDSB/W PADDUSB/W
- Page 35 and 36: K10 LDMXCSR m 12 12 10 STMXCSR m 3
- Page 37 and 38: Bulldozer Integer instructions Inst
- Page 39 and 40: Bulldozer TEST m,r 1 0.5 EX01 TEST
- Page 41 and 42: Bulldozer FLD m80 8 14 4 fp FBLD m8
- Page 43 and 44: Bulldozer MASKMOVQ mm,mm 31 38 37 P
- Page 45 and 46: Bulldozer MOVDDUP x,x 1 2 1 P1 ivec
- Page 47 and 48: Logic AND/ANDN/OR/XORPS/ PD VAND/AN
- Page 49 and 50: Bobcat AMD Bobcat List of instructi
- Page 51 and 52: Bobcat IMUL r16,(r16),i 2 4 3 I0 IM
- Page 53 and 54: Bobcat Move instructions FLD r 1 2
- Page 55 and 56: Bobcat PUNPCKH/LBW/WD/ DQ PUNPCKH/L
- Page 57 and 58: Bobcat MOVSHDUP, MOVSLDUP r,m 2 12
- Page 59 and 60: Intel Pentium Intel Pentium and Pen
- Page 61 and 62:
Intel Pentium REP MOVS 12+n g) np S
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s Intel Pentium May be up to 3 cloc
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Pentium II and III PUSHF(D) 3 11 1
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Pentium II and III a) Faster under
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Pentium II and III PMOVMSKB d) r32,
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Pentium M Intel Pentium M, Core Sol
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Pentium M DIV IDIV r16 4 3 1 15-24
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Pentium M FLD r 1 1 1 FLD m32/64 1
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Pentium M MOVNTDQ PACKSSWB/DW m128,
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Pentium M MOVUPS/D m128,xmm 8 4 2 2
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Pentium M RSQRTSS xmm,xmm 1 1 3 1 R
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Merom Move instructions MOV r,r/i 1
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Merom ROR ROL m,i/cl 3 2 x x 1 1 1
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Merom FLDPI FLDL2E etc. 2 2 2 float
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Merom PALIGNR h) xmm,m128,i 2 2 x x
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Merom UNPCKH/LPD xmm,m128 2 1 1 1 f
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Wolfdale Intel Core 2 (Wolfdale, 45
- Page 95 and 96:
Wolfdale ADC SBB r,m 2 2 x x x 1 2
- Page 97 and 98:
Wolfdale LODS 3 2 1 1 REP LODS 4+7n
- Page 99 and 100:
Wolfdale Other FNOP 1 1 1 float 1 W
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Wolfdale Arithmetic instructions PA
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Wolfdale SHUFPS xmm,m128,i 2 1 1 1
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Wolfdale DPPD j) xmm,m128,i 4 4 x x
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Latency: Reciprocal throughput: Neh
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Nehalem CBW CWDE CDQE 1 1 x x x int
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Nehalem Floating point x87 instruct
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Nehalem MOVNTDQA j) PACKSSWB/DW PAC
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Nehalem PHMINPOSUW j) PABSB PABSW P
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Nehalem CVTDQ2PS xmm,xmm 1 1 1 floa
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Sandy Bridge Intel Sandy Bridge Lis
- Page 121 and 122:
Sandy Bridge INC DEC NEG NOT r 1 1
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Sandy Bridge CALL m 3 2 1 2 1 2 RET
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Sandy Bridge FYL2XP1 464 464 726 FP
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Sandy Bridge PCMPEQ/GTB/W/D (x)mm,m
- Page 129 and 130:
Sandy Bridge MOVMSKPS/D r32,x 1 1 1
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Sandy Bridge ADDSS/D SUBSS/D x,x 1
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Pentium 4 Intel Pentium 4 List of i
- Page 135 and 136:
Pentium 4 SFENCE 4 2 40 sse LFENCE
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Pentium 4 RETF i 4 33 11 0 86 IRET
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Pentium 4 Math FSQRT 1 0 43 0 43 1
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Pentium 4 PMIN/MAXSW r,r/m 1 0 2 1
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Pentium 4 h) Throughput of FP-MUL u
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Prescott MOV r64,i64 2 0 0 1 1 alu1
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Prescott IDIV r8/m8 1 21 76 0 34 1
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Prescott RDPMC (bit 31 = 1) 1 37 10
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Prescott Other FNOP 1 0 1 0 1 0 mov
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Prescott Other EMMS Notes: 10 10 12
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Atom Intel Atom List of instruction
- Page 157 and 158:
Atom IMUL r16,r16 2 ALU0, Mul 6 5 I
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Atom NOP (90) 1 ALU0/1 1/2 Long NOP
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Atom PACKSSWB/DW PACKUSWB (x)mm, (x
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Atom HADDPS HSUBPS xmm,xmm 5 FP0+1
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VIA Nano 2000 MOVSX MOVSXD MOVZX r,
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VIA Nano 2000 SETcc m 1 CLC STC CMC
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VIA Nano 2000 FABS 1 MB 1 1 FCHS 1
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VIA Nano 2000 Floating point XMM in
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VIA Nano 2000 REP XCRYPTECB 192 bit
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Nano 3000 MOVSX MOVZX r,r 1 I12 1 1
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Nano 3000 Control transfer instruct
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Nano 3000 FCOMPP FUCOMPP 1 MB 1 FCO
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PABSB PABSW PABSD PSIGNB PSIGNW PSI
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Nano 3000 Other LDMXCSR m32 31 STMX