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THP006 Proceedings <strong>of</strong> LINAC 2006, Knoxville, Tennessee USA<br />

PERFORMANCE OF A DIGITAL <strong>LLRF</strong> FIELD CONTROL SYSTEM FOR<br />

THE J-PARC LINAC<br />

S.Michizono # , S.Anami, Z.Fang, S.Yamaguchi, KEK, Tsukuba, Japan<br />

T.Kobayashi, H.Suzuki, JAEA, Tokai, Japan<br />

Abstract<br />

Twenty high-power klystrons are installed in <strong>the</strong> J-<br />

PARC linac. The requirements <strong>for</strong> <strong>the</strong> rf field stabilities<br />

are +-1% in amplitude and +-1 degree in phase during a<br />

500 μs flat-top. In order to satisfy <strong>the</strong>se requirements, we<br />

have adopted a digital feedback and feed-<strong>for</strong>ward system<br />

with FPGAs and a commercially available DSP board.<br />

The FPGAs (Virtex-II 2000) enable fast PI control <strong>for</strong> a<br />

vector sum <strong>of</strong> two cavity fields. The measured stability<br />

during an rf pulse was +-0.06% in amplitude and +-0.05<br />

degree in phase. The tuner control was successively<br />

operated by way <strong>of</strong> <strong>the</strong> DSP board by measuring <strong>the</strong><br />

phase difference between <strong>the</strong> cavity input wave and <strong>the</strong><br />

cavity field. Beam loading effects were emulated using a<br />

beam-loading test box. By proper feed-<strong>for</strong>ward, <strong>the</strong> rf<br />

stability was less than +-0.3% and +-0.15 degree.<br />

INTRODUCTION<br />

We have installed 20 high-power klystrons (324 MHz,<br />

max. 3 MW) in <strong>the</strong> J-PARC linac. These klystrons drive<br />

RFQ, DTLs and SDTLs [1]. The required stabilities <strong>of</strong> <strong>the</strong><br />

rf outputs are less than +-1% in amplitude and less than +-<br />

1 degree in phase. In order to satisfy <strong>the</strong>se requirements, a<br />

digital feedback system using a compact PCI (cPCI) has<br />

been developed. The system consists <strong>of</strong> a FPGA board, a<br />

DSP board, a mixer and down-converter, an rf&clock<br />

generator and an I/O board [2,3]. The FPGA board has<br />

two FPGAs (VirtexII2000), four 14-bit ADCs (AD6644)<br />

and four 14-bit DACs (AD9764), which works as a<br />

mezzanine card <strong>of</strong> a commercially available DSP board<br />

(Barcelona by Spectrum). The DSP board is used as a<br />

tuner control <strong>of</strong> <strong>the</strong> cavities and communication between<br />

<strong>the</strong> FPGAs and <strong>the</strong> local host [4].<br />

Intermediate-frequency (IF; 12 MHz) signals from<br />

pick-ups are directly detected by ADCs with 48 MHz<br />

sampling. Two cavity pick-ups are processed in FPGA1<br />

and <strong>the</strong> <strong>for</strong>ward powers are processed in FPGA1. Cavity<br />

signals are separated into I and Q components, and a<br />

feedback (FB) algorithm (PI-control) is operated with a<br />

vector sum <strong>of</strong> two cavities. A feed-<strong>for</strong>ward table is added<br />

in order to compensate <strong>for</strong> any transient behaviour and/or<br />

beam-loading.<br />

VECTOR SUM CONTROL<br />

A klystron drives two cavities in <strong>the</strong> case <strong>of</strong> <strong>the</strong> SDTL<br />

module, and <strong>the</strong> vector sum <strong>of</strong> two cavity signals is<br />

calculated. The operated vector sum control at a SDTL is<br />

shown in Fig. 1. The set-values are 6,000 in amplitude<br />

and 0 degree in phase. Since <strong>the</strong> FPGA handles integer<br />

___________________________________________<br />

# shinichiro.michizono@kek.jp<br />

numbers, <strong>the</strong> integer set-value is used. The proportional<br />

and integral gains are 4 and 0.01, respectively. The<br />

stability <strong>of</strong> <strong>the</strong> vector sum during <strong>the</strong> flat-top is less than<br />

+-0.06% in amplitude and +-0.05degree in phase.<br />

EXTERNAL MONITOR<br />

In order to confirm <strong>the</strong> stability <strong>of</strong> <strong>the</strong> feedback, we<br />

measure <strong>the</strong> amplitude and <strong>the</strong> phase with an external<br />

monitor. Figure 2 shows a schematic <strong>of</strong> <strong>the</strong> external<br />

monitor. The amplitudes are measured by diodes, and <strong>the</strong><br />

phases are measured with two mixers. The signals are<br />

stored in a computer by way <strong>of</strong> a commercially available<br />

FPGA board (Xilinx XtremeDSP) with two 14-bit ADCs.<br />

Data acquisitions are carried out every 1 μs. The obtained<br />

data are shown in Fig. 3. The set-values are 6,000 in<br />

amplitude and 0 degree in phase, respectively and<br />

stability is less than +-0.2% and +-0.2 degree. Since <strong>the</strong><br />

band-width <strong>of</strong> <strong>the</strong> cavity is less than 20 kHz, <strong>the</strong> fast<br />

noises in Fig. 3 are included in <strong>the</strong> monitor. It is<br />

considered that better stabilities would be accomplished<br />

in <strong>the</strong> cavities.<br />

7000<br />

6000<br />

5000<br />

4000<br />

3000<br />

2000<br />

1000<br />

(a)<br />

0<br />

0 100 200 300 400 500 600 700<br />

6100<br />

6050<br />

6000<br />

5950<br />

5900<br />

4<br />

3<br />

2<br />

1<br />

0<br />

-1<br />

-2<br />

-3<br />

-4<br />

(b)<br />

Cavity 1<br />

Vector Sum<br />

Cavity 2<br />

100 200 300 400 500 600 700<br />

(c)<br />

Cavity 1<br />

Vector Sum<br />

Cavity 2<br />

100 200 300 400 500 600 700<br />

Time [us]<br />

Figure 1: <strong>Per<strong>for</strong>mance</strong> <strong>of</strong> <strong>the</strong> vector sum FB control. (a)<br />

and (b), amplitude; (c) phase. Set-values are 6,000 in<br />

amplitude and 0 degree in phase. The proportional gain <strong>of</strong><br />

4 and integral gain <strong>of</strong> 0.01 <strong>for</strong> a 48 MHz clock<br />

accumulation are applied.<br />

574 Technology, Components, and Subsystems<br />

<strong>Control</strong> <strong>System</strong>s


Figure 2: Schematic <strong>of</strong> <strong>the</strong> external monitor system.<br />

TUNER CONTROL<br />

The phase difference between <strong>the</strong> <strong>for</strong>ward rf power and<br />

<strong>the</strong> cavity is related to cavity tuning. Tuner control is<br />

carried out by monitoring <strong>the</strong> phase difference in order to<br />

maintain <strong>the</strong> set-tuning angle. The measured phase<br />

difference is compared with <strong>the</strong> set-detuning angle. These<br />

calculations are made by one <strong>of</strong> <strong>the</strong> four DSPs on<br />

Barcelona. When <strong>the</strong> measured tuning is different from<br />

set-value, <strong>for</strong> example, by more than 1 degree, tunercontrol<br />

starts. The control continues until <strong>the</strong> difference<br />

becomes less than 0.2 degree. An example <strong>of</strong> <strong>the</strong> tuner<br />

controls is shown in Fig. 4. In this example, we changed<br />

<strong>the</strong> tuner position by about +1 mm (cavity 1 at around 1<br />

min.) and -1 mm (cavity 2 at around 4 min.), manually.<br />

The corresponding detuning was about 15 degrees. This<br />

detuning was much larger than <strong>the</strong> expected value during<br />

operation (typically around 1 degree), but <strong>the</strong> tuner<br />

position stabilized. During <strong>the</strong> tuner control, <strong>the</strong> vector<br />

sum was still stable owing to <strong>the</strong> cavity feedback control<br />

even though <strong>the</strong> amplitudes and phases <strong>of</strong> two cavities<br />

were different due to <strong>the</strong> detuning.<br />

1.005<br />

1<br />

0.995<br />

0.6<br />

0.4<br />

0.2<br />

0<br />

-0.2<br />

-0.4<br />

Cavity 1<br />

100 200 300 400 500 600 700<br />

time [us]<br />

Cavity 1<br />

+-0.5%<br />

+-0.2deg.<br />

Cavity 2<br />

Cavity 2<br />

100 200 300 400 500 600 700<br />

time [us]<br />

1.005<br />

1<br />

0.995<br />

Figure 3: Amplitude and phase stability during an rf pulse<br />

monitored with an external monitor.(a):normalized<br />

amplitude and (b) phase. The FB parameters are same to<br />

Figure 1.<br />

Technology, Components, and Subsystems<br />

<strong>Control</strong> <strong>System</strong>s<br />

Proceedings <strong>of</strong> LINAC 2006, Knoxville, Tennessee USA THP006<br />

± 0.8%<br />

1<br />

0.75<br />

0.5<br />

Cavity1<br />

Cavity2<br />

0<br />

-0.25<br />

-0.5<br />

0.25<br />

-0.75<br />

0<br />

0 2 4 6 8 10 12<br />

-1<br />

14<br />

6300<br />

Cavity2<br />

6200<br />

6100<br />

6000<br />

5900<br />

Vector Sum<br />

Cavity1<br />

5800<br />

0 2 4 6 8 10 12 14<br />

10<br />

5<br />

0<br />

-5<br />

Cavity1<br />

Vector Sum<br />

Cavity2<br />

-10<br />

0 2 4 6 8 10 12 14<br />

Time [min.]<br />

Figure 4: Tuner position, amplitudes and phases <strong>of</strong> cavity<br />

1 and 2 during <strong>the</strong> tuner control test. The tuner positions<br />

are changed +-1 mm (corresponding +-15 degree<br />

detuning) manually and <strong>the</strong>se returned in 2 minutes by<br />

tuner control.<br />

BEAM LOADING COMPENSATION<br />

In order to examine <strong>the</strong> beam-loading effects on <strong>the</strong><br />

feedback, we introduced a beam-loading test box [1]. A<br />

schematic <strong>of</strong> <strong>the</strong> beam-loading test is shown in Fig. 5. The<br />

test-box consists <strong>of</strong> phase-shifter and a mixer. The beamloaded<br />

cavity signal without FB is shown in Fig. 6. About<br />

a 15% decrease in amplitude is observed by <strong>the</strong> test-box<br />

in this case. The stabilities during feedback operation at<br />

<strong>the</strong> beginning and end <strong>of</strong> <strong>the</strong> beam pulse were around +-<br />

5% in amplitude and +-2 degree in phase because <strong>the</strong><br />

feedback algorism can not follow completely due to <strong>the</strong><br />

loop delay. By adding <strong>the</strong> proper feed-<strong>for</strong>ward<br />

synchronized with <strong>the</strong> beam pulse, <strong>the</strong> stabilities were<br />

improved drastically to +-0.3% in amplitude and +-0.15<br />

degree in phase, respectively, as shown in Fig. 7. It is<br />

confirmed that <strong>the</strong> feed-<strong>for</strong>ward is effective <strong>for</strong> a constant<br />

disturbance.<br />

I/Q out<br />

cPCI digital FB (324MHz)<br />

~0dBm<br />

Attenuator<br />

FB monitor<br />

Mixer in<br />

~0dBm<br />

trigger<br />

unit<br />

Ext.Trig.<br />

PC<br />

E<strong>the</strong>rnet<br />

XPORT<br />

RS232C<br />

Attenuator<br />

FPGA<br />

VurtexII3000<br />

beam<br />

loading<br />

test box<br />

Ext.Trig.<br />

14-bit<br />

ADC<br />

14-bit<br />

ADC<br />

External monitor<br />

Limit<br />

Amp. Klystron<br />

wave<br />

detector<br />

324 MHz<br />

cavity1<br />

Mixer<br />

Figure 5: Schematic <strong>of</strong> beam loading compensation<br />

examination.<br />

575


THP006 Proceedings <strong>of</strong> LINAC 2006, Knoxville, Tennessee USA<br />

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6,000<br />

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1,000<br />

0<br />

1.01<br />

1.005<br />

1<br />

0.995<br />

0.99<br />

0 100 200 300 400<br />

time [us]<br />

500 600 700 800<br />

1<br />

0.5<br />

0<br />

-0.5<br />

-1<br />

LINEARITY FOR PHASE-SCAN<br />

In commissioning <strong>the</strong> J-PARC linac, first <strong>of</strong> all, <strong>the</strong><br />

accelerated beam characteristics were compared with <strong>the</strong><br />

calculation under various rf parameters (phase-scan under<br />

a constant amplitude set-level). Thus, amplitude stability<br />

is required <strong>for</strong> <strong>the</strong> various set-phases. Since a distortion <strong>of</strong><br />

<strong>the</strong> IF signal (Mixer output) results in phase and<br />

amplitude errors, <strong>the</strong> amplitude is measured with a diode<br />

cPCI<br />

0 200 400 600 800<br />

NIM<br />

trigger<br />

unit a)<br />

Q<br />

Ext.Trig.<br />

PC<br />

100 200 300 400<br />

time [us]<br />

500 600 700 800<br />

Figure 7: Beam-loading compensation by FB with<br />

proper feed <strong>for</strong>ward. The stability is +-0.3% in<br />

amplitude and +-0.15 degree in phase during <strong>the</strong> flat<br />

top.<br />

I<br />

I/Q out<br />

(324MHz)<br />

~0dBm<br />

Attenuator<br />

Mixer in<br />

(324MHz)<br />

~0dBm<br />

XPORT<br />

E<strong>the</strong>rnet RS232C<br />

FPGA<br />

VurtexII3000<br />

Amp.<br />

Attenuator<br />

Ext.Trig.<br />

Time [us]<br />

14-bit<br />

ADC<br />

cavity simulator<br />

Cavity Amp.<br />

Kly Amp.<br />

-15%<br />

Figure 6: Effects <strong>of</strong> <strong>the</strong> beam-loading test box. Beam<br />

loading <strong>of</strong> 15% is generated by <strong>the</strong> test box. This signal<br />

is obtained at <strong>the</strong> cavity without any feedback (only<br />

feed-<strong>for</strong>ward).<br />

Figure 8: Schematic <strong>of</strong> <strong>the</strong> linearity test.<br />

-0.1%<br />

+0.1%<br />

Figure 9: Results <strong>of</strong> <strong>the</strong> amplitude errors with various<br />

phases. The stabilities in amplitude are less than +-0.15%,<br />

<strong>the</strong> comparable to <strong>the</strong> pulse-to-pulse stability.<br />

detector under various set-phases with feedback. If a<br />

distortion <strong>of</strong> <strong>the</strong> mixers and/or non-linearity <strong>of</strong> <strong>the</strong> ADCs<br />

exist, a difference in amplitude between <strong>the</strong> external<br />

monitor and <strong>the</strong> internal FB monitor should appear. A<br />

schematic <strong>of</strong> <strong>the</strong> linearity test is shown in Fig. 8. Figure 9<br />

shows <strong>the</strong> results <strong>of</strong> <strong>the</strong> phase-linearity. The obtained<br />

stability is less than +-0.15% under <strong>the</strong> various set-values.<br />

This error is <strong>the</strong> same as <strong>the</strong> pulse-to-pulse amplitude<br />

errors, and thus <strong>the</strong> linearity is satisfied during <strong>the</strong> phasescan.<br />

SUMMARY<br />

The per<strong>for</strong>mance <strong>of</strong> <strong>the</strong> digital FB system used at <strong>the</strong> J-<br />

PARC linac satisfies <strong>the</strong> requirements, and a stability <strong>of</strong><br />

less than +-0.06% in amplitude and +-0.05 degree are<br />

obtained in <strong>the</strong> internal monitor. The external monitor,<br />

where <strong>the</strong> amplitude and phase are measured by diodedetectors<br />

and mixers, show a stability <strong>of</strong> less than +-0.2%<br />

in amplitude and +-0.2 degree. The tuner control is<br />

calculated in DSP, and reaches its goal <strong>of</strong> within 0.2<br />

degree in detuning within 2 min. <strong>of</strong> operation. It was<br />

shown that <strong>the</strong> beam loading can be compensated with<br />

proper feed <strong>for</strong>ward. The linearity <strong>of</strong> <strong>the</strong> IF signals was<br />

confirmed by a comparison between external and FB<br />

monitors. The conditioning <strong>of</strong> <strong>the</strong> cavities in <strong>the</strong> J-PARC<br />

linac will start this September, and beam commissioning<br />

will start this year.<br />

REFERENCES<br />

[1] S.Yamaguchi et al., “Overview <strong>of</strong> The RF <strong>System</strong> <strong>for</strong><br />

The JAERI/KEK High-Intensity Proton Linac”,<br />

LINAC2002, Gyeongju, Aug. 2002, p.452.<br />

[2 S. Michizono et al., “ <strong>Digital</strong> Feedback Ssystem <strong>for</strong><br />

J-Parc Linac RF Source”, LINAC2004, Luebeck,<br />

Aug. 2004, p.742.<br />

[3] T. Kobayashi et al., “<strong>Per<strong>for</strong>mance</strong> <strong>of</strong> RF Reference<br />

Distribution <strong>System</strong> <strong>for</strong> <strong>the</strong> J-PARC Linac”, this<br />

conference.<br />

[4] S. Anami et al., “<strong>Control</strong> <strong>of</strong> <strong>the</strong> Low Level RF<br />

<strong>System</strong> <strong>for</strong> <strong>the</strong> J-Parc Linac”, LINAC2004, Luebeck,<br />

Aug. 2004, p.739.<br />

576 Technology, Components, and Subsystems<br />

<strong>Control</strong> <strong>System</strong>s

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