Sable CPU Module Specification
Sable CPU Module Specification Sable CPU Module Specification
3.9.9 Fill Address Register (FILL_ADDR) Copyright © 1993 Digital Equipment Corporation. This read-only register contains the physical address associated with errors reported by BIU_STAT[14..8]. Its contents are meaningful only when FILL_EDC or FILL_ DPERR is set. Reads of FILL_ADDR unlock FILL_ADDR, BIU_STAT[14..8] and FILL_SYNDROME. In the 21064, FILL_ADDR[33..5] identify the 32-byte cache block which the CPU was attempting to read when the error occurred. In the 21064, if the FILL_IRD bit of the BIU_STAT register is clear, indicating that the error occurred during a D-stream cache fill, then FILL_ADDR[4..2] contain bits [4..2] of the physical address generated by the load instruction which triggered the cache fill. If FILL_IRD is set, then FILL_ADDR[4..2] are UNPREDICTABLE. FILL_ ADDR[63..34] and FILL_ADDR[1..0] read as zero. Functions Located on the DECchip 21064 77
Copyright © 1993 Digital Equipment Corporation. 3.9.10 Fill Syndrome Register (FILL_SYNDROME) The FILL_SYNDROME register is a 14-bit read-only register. If the chip is in EDC mode and an EDC error is recognized during a primary cache fill operation, the syndrome bits associated with the bad quadword are locked in the FILL_SYNDROME register. FILL_SYNDROME[6..0] contain the syndrome associated with the lower longword of the quadword, and FILL_SYNDROME[13..7] contain the syndrome associated with the upper longword of the quadword. A syndrome value of zero means that no errors where found in the associated longword. See Table 25 for a list of syndromes associated with correctable single-bit errors. The FILL_SYNDROME register is unlocked when the FILL_ADDR register is read. If the chip is in parity mode and a parity error is recognized during a primary cache fill operation, the FILL_SYNDROME register indicates which of the longword in the quadword got bad parity. FILL_SYNDROME[0] is set to indicate that the low longword was corrupted, and FILL_SYNDROME[7] is set to indicate that the high longword was corrupted. FILL_SYNDROME[13..8] and [6..1] are RAZ in parity mode. Figure 38: Fill Syndrome Table 25: Syndromes for Single-Bit Errors 6 3 1 1 4 3 0 0 7 6 RAZ HI[6..0] LO[6..0] 0 0 FILL_SYNDROME Data Bit Syndrome(Hex) Check Bit Syndrome(Hex) 00 4F 00 01 01 4A 01 02 02 52 02 04 03 54 03 08 04 57 04 10 05 58 05 20 06 5B 06 40 07 5D 08 23 09 25 10 26 11 29 78 Functions Located on the DECchip 21064
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Copyright © 1993 Digital Equipment Corporation.<br />
3.9.10 Fill Syndrome Register (FILL_SYNDROME)<br />
The FILL_SYNDROME register is a 14-bit read-only register.<br />
If the chip is in EDC mode and an EDC error is recognized during a primary cache<br />
fill operation, the syndrome bits associated with the bad quadword are locked in<br />
the FILL_SYNDROME register. FILL_SYNDROME[6..0] contain the syndrome associated<br />
with the lower longword of the quadword, and FILL_SYNDROME[13..7]<br />
contain the syndrome associated with the upper longword of the quadword. A syndrome<br />
value of zero means that no errors where found in the associated longword.<br />
See Table 25 for a list of syndromes associated with correctable single-bit errors. The<br />
FILL_SYNDROME register is unlocked when the FILL_ADDR register is read.<br />
If the chip is in parity mode and a parity error is recognized during a primary cache<br />
fill operation, the FILL_SYNDROME register indicates which of the longword in the<br />
quadword got bad parity. FILL_SYNDROME[0] is set to indicate that the low longword<br />
was corrupted, and FILL_SYNDROME[7] is set to indicate that the high longword<br />
was corrupted. FILL_SYNDROME[13..8] and [6..1] are RAZ in parity mode.<br />
Figure 38: Fill Syndrome<br />
Table 25: Syndromes for Single-Bit Errors<br />
6<br />
3<br />
1 1<br />
4 3<br />
0 0<br />
7 6<br />
RAZ HI[6..0] LO[6..0]<br />
0<br />
0<br />
FILL_SYNDROME<br />
Data Bit Syndrome(Hex) Check Bit Syndrome(Hex)<br />
00 4F 00 01<br />
01 4A 01 02<br />
02 52 02 04<br />
03 54 03 08<br />
04 57 04 10<br />
05 58 05 20<br />
06 5B 06 40<br />
07 5D<br />
08 23<br />
09 25<br />
10 26<br />
11 29<br />
78 Functions Located on the DECchip 21064