Sable CPU Module Specification
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Sable CPU Module Specification

Sable CPU Module Specification Sable CPU Module Specification

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Table 13 (Cont.): BIU Control Register Description Field Description Copyright © 1993 Digital Equipment Corporation. Backup (external) cache read speed. This field indicates to the bus interface unit the read access time of the RAMs used to implement the off-chip external cache, measured in CPU cycles. This field should be written with a value equal to one less the read access time of the external cache RAMs. Access times for reads must be in the range 16..3 CPU cycles, which means the values for the BC_RD_SPD field are in the range of 15..2. BC_RD_SPD are not initialized on reset and must be explicitly written before enabling the external cache. 3 BC_FHIT [ write-only ] Backup cache force hit. (This cache is external to the 21064 chip.) When this bit and BC_EN are set, all pin bus READ_BLOCK and WRITE_BLOCK transactions are forced to hit in the backup cache. Tag and tag control parity are ignored when the BIU operates in this mode. BC_EN takes precedence over BC_FHIT. When BC_EN is clear and BC_FHIT is set, no tag probes occur and external requests are directed to the CREQ_H pins. Note that the BC_PA_DIS field takes precedence over the BC_FHIT bit. 2 OE [ write-only ] Output enable - When this bit is set, the 21064 CHP chip does not assert its chip enable pins during RAM write cycles, thus enabling these pins to be connected to the output enable pins of the cache RAMs. 1 EDC [ write-only ] Error detection and correction. When this bit is set, the 21064 CPU chip generates/expects EDC on the CHECK_H pins. When this bit is clear the CPU chip generates/expects parity on four of the CHECK_H pins. 0 BC_ENA [ write-only ] External cache enable. When clear, this bit disables the external cache. When the external cache is disabled, the BIU does not probe the external cache tag store for read and write references; it initiates a request on CREQ_H immediately. Functions Located on the DECchip 21064 49

Copyright © 1993 Digital Equipment Corporation. Figure 30: DECchip 21064-A275 BIU Control Register (EV45_BIU_CTL) 6666555555555544 4444444433333333 3322222222221111 111111 3210987654321098 7654321098765432 1098765432109876 5432109876543210 FAST_LOCK (WO) BC_BURST_ALL (WO) BC_BURST_SPD (WO) IMAP_EN (WO) SYS_WRAP (WO) BYTE_PARITY (WO) BAD_DP (WO) BC_PA_DIS (WO) BAD_TCP (WO) BC_SIZE (WO) BC_WE_CTL[15:1] (WO) DELAY_WDATA (WO) BC_WR_SPD (WO) BC_RD_SPD (WO) BC_FHIT (WO) OE (WO) EDC (WO) BC_ENA (WO) Table 14: DECchip 21064-A275 BIU Control Register Description Field Description 44 FAST_LOCK [ write-only ] When set, fast_lock mode operation is selected. This mode can be used only when BIU_CTL is also set, indicating that OE-mode Bcache RAMs are used. Cleared by reset. 43 BC_BURST_ALL [ write-only ] 42:40 BC_BURST_SPD [ write-only ] 39 IMAP_EN [ write-only ] Set to allow dMapWe_h to assert for I-stream backup cache reads. Cleared by reset. 38 SYS_WRAP [ write-only ] 37 BYTE_PARITY [ write-only ] If set when BIU_CTL is cleared, external byte parity id selected, When BIU_CTL us set, this bit is ignored, BYTE_ARITY is cleared by reset. 36 BAD_DP [ write-only ] 50 Functions Located on the DECchip 21064

Copyright © 1993 Digital Equipment Corporation.<br />

Figure 30: DECchip 21064-A275 BIU Control Register (EV45_BIU_CTL)<br />

6666555555555544<br />

4444444433333333<br />

3322222222221111<br />

111111<br />

3210987654321098<br />

7654321098765432<br />

1098765432109876<br />

5432109876543210<br />

FAST_LOCK (WO)<br />

BC_BURST_ALL (WO)<br />

BC_BURST_SPD (WO)<br />

IMAP_EN (WO)<br />

SYS_WRAP (WO)<br />

BYTE_PARITY (WO)<br />

BAD_DP (WO)<br />

BC_PA_DIS (WO)<br />

BAD_TCP (WO)<br />

BC_SIZE (WO)<br />

BC_WE_CTL[15:1] (WO)<br />

DELAY_WDATA (WO)<br />

BC_WR_SPD (WO)<br />

BC_RD_SPD (WO)<br />

BC_FHIT (WO)<br />

OE (WO)<br />

EDC (WO)<br />

BC_ENA (WO)<br />

Table 14: DECchip 21064-A275 BIU Control Register Description<br />

Field Description<br />

44 FAST_LOCK [ write-only ]<br />

When set, fast_lock mode operation is selected. This mode can be used only when BIU_CTL<br />

is also set, indicating that OE-mode Bcache RAMs are used. Cleared by reset.<br />

43 BC_BURST_ALL [ write-only ]<br />

42:40 BC_BURST_SPD [ write-only ]<br />

39 IMAP_EN [ write-only ]<br />

Set to allow dMapWe_h to assert for I-stream backup cache reads. Cleared by reset.<br />

38 SYS_WRAP [ write-only ]<br />

37 BYTE_PARITY [ write-only ]<br />

If set when BIU_CTL is cleared, external byte parity id selected, When BIU_CTL<br />

us set, this bit is ignored, BYTE_ARITY is cleared by reset.<br />

36 BAD_DP [ write-only ]<br />

50 Functions Located on the DECchip 21064

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