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Sable CPU Module Specification

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3.2 Ebox<br />

The Ebox contains the 64-bit integer execution datapath.<br />

• Adder<br />

• Logic box<br />

• Barrel shifter<br />

• Byte zapper<br />

• Bypassers<br />

• Integer multiplier<br />

Copyright © 1993 Digital Equipment Corporation.<br />

The integer multiplier retires four bits per cycle. The Ebox also contains the 32-entry<br />

64-bit integer register file. The register file has four read ports and two write ports<br />

that allow reading operands from and writing operands (results) to both the integer<br />

execution datapath and the Abox.<br />

3.3 Abox<br />

The A-box in the 21064 contains six major sections:<br />

• Address translation datapath<br />

• Load silo<br />

• Write buffer<br />

• Dcache interface<br />

• Internal processor registers (IPRs)<br />

• External bus interface unit (BIU)<br />

The address translation datapath has a displacement adder that generates the effective<br />

virtual address for load and store instructions, and a translation buffer(S) that<br />

generates the corresponding physical address.<br />

3.3.1 Abox IPRs<br />

Section 3.3.2 through Section 3.3.16 describe the registers contained within the 21064<br />

processor’s A-box unit.<br />

Functions Located on the DECchip 21064 37

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